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Flash memory data buffer area replacement method based on page access interval

A data buffer and page access technology, which is applied in the field of flash memory storage, can solve the problems of consumption of flash memory erase times, flash life and reliability impact, and achieve the goal of prolonging the life of flash memory, improving the life of flash memory system, and reducing data page read operations Effect

Inactive Publication Date: 2017-11-10
XI AN JIAOTONG UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In addition, write operations consume the finite endurance of the flash memory, so frequent writes back to the flash memory can negatively affect the lifespan and reliability of the flash memory

Method used

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  • Flash memory data buffer area replacement method based on page access interval
  • Flash memory data buffer area replacement method based on page access interval

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Embodiment Construction

[0022] The specific implementation method of the present invention will be further explained in detail below in conjunction with the accompanying drawings and embodiments. The following examples are used to illustrate specific implementation methods of the present invention, but do not limit the scope of the present invention.

[0023] The framework module described in the embodiment includes:

[0024] Module 1 buffer retrieval module, used to retrieve whether there is a requested data page in the buffer;

[0025] Module 2 level-1 data buffer, used to store hot data pages and recently accessed cold data pages;

[0026] Module 3 secondary data buffer, used to store cold data pages eliminated from the primary data buffer;

[0027] Module 4 is a buffer replacement module, which is used to select cold non-dirty data pages of the secondary buffer for elimination.

[0028] refer to figure 1 , figure 2 As shown, the basic flow of the flash memory buffer replacement method of th...

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Abstract

The invention discloses a flash memory data buffer area replacement method based on a page access interval. In the method, all data pages cached in the data buffer area are divided into hot dirty data pages, cold dirty data pages, hot clean data pages and cold clean data pages according to access interval characteristics and reading / writing characteristics of the data pages in the buffer area, and all the data pages are managed by using a primary data buffer area and a secondary data buffer area. When the cold data page access interval is less than the last hot data page in an LRU queue of the buffer area, conversion between cold and hot data pages is performed, and meanwhile, the cold data page in the LRU queue of the primary buffer area is moved into the secondary data buffer area. When the data buffer area page needs to be replaced, the cold clean data pages in the secondary buffer area are preferentially shifted out according to an LRU rule, and the influence on performance and service life of a flash memory due to too many times of write-back operations of the dirty data pages of the data buffer area is reduced under the premise of ensuring a hit rate.

Description

technical field [0001] The invention relates to the technical field of flash memory storage, in particular to a data buffer replacement method in a flash memory storage system. Background technique [0002] Flash memory has the advantages of fast access speed, low power consumption, high integration and good shock resistance. In recent years, with the development of flash memory technology, the price of flash memory media has dropped, and flash memory has been widely used in consumer electronics, enterprise servers, and data centers. [0003] The buffer is a data buffer unit between the external memory and the internal memory. It is mainly used for speed matching between the low-speed external memory and the high-speed memory in the computer system to improve the overall performance of the computer system. In a flash storage system, the design of a flash data buffer is different from that of a traditional disk storage system. In the disk, the latency of read and write oper...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/02G06F12/123
CPCG06F12/0246G06F12/0253G06F12/123G06F2212/7202G06F2212/7205
Inventor 张兴军周权彪董小社梁宁静蔡毅武旭瑞刘云飞
Owner XI AN JIAOTONG UNIV
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