Manufacturing method of super small unit size vertical super-junction semiconductor device

Abstract

The invention relates to a manufacturing method of a super small unit size vertical super-junction semiconductor device. The method comprises steps that a hard mask layer is utilized to carry out deep groove etching on a first conductive type semiconductor substrate; a second conductive type epitaxial layer is deposited; anisotropy etching is carried out, and a bottom epitaxial layer of a deep groove is removed; first conductive type impurity injection is carried out; a first conductive type epitaxial layer is deposited to fill the deep groove; planarization of a first main surface of the semiconductor substrate is carried out, the hard mask layer is further removed, the second conductive type epitaxial layer of the side wall of the deep groove forms a second conductive type column of a vertical super-junction structure, and the first conductive type substrate and the first conductive type epitaxial layer respectively form a first conductive type first column and a first conductive type second column. The method is advantaged in that the unit size of the super-junction structure can be substantially reduced on the condition that process difficulty does not increase, and width restrictions of the technology capability in the prior art for the second conductive type column can be broken through.

Description

technical field [0001] The invention relates to a method for manufacturing a super junction semiconductor device, in particular to a method for manufacturing a vertical super junction semiconductor device with an ultra-small unit size. Background technique [0002] In the field of medium and high voltage power semiconductor devices, the vertical super junction structure (Super Junction) has been widely used. Compared with traditional power MOSFET devices, the super junction structure can obtain a better compromise between device withstand voltage and on-resistance. The super junction structure is formed in the drift region of the semiconductor device, extending from the surface of the semiconductor device along the thickness direction to the drift layer body. The super junction structure includes N-conductivity type pillars (N pillars) and P-conductivity type pillars (P pillars), N pillars and A plurality of P-N column pairs formed by alternately adjoining the P columns form...

AI Technical Summary

Problems solved by technology

Moreover, when using the above two methods to manufacture super-junction semiconductor devices, under the condition of the same structural unit size, the width of the P-pillar is limited and the process limit capability cannot be further reduced.

[0006

Images