[0022] Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings. In the various figures, identical elements are indicated with similar reference numerals. For the sake of clarity, various parts in the drawings have not been drawn to scale. Also, some well-known parts may not be shown in the drawings.
[0023] In the following, many specific details of the present invention are described, such as device structures, materials, dimensions, processing techniques and techniques, for a clearer understanding of the present invention. However, the invention may be practiced without these specific details, as will be understood by those skilled in the art.
[0024] Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.
[0025] figure 1 A schematic structural diagram of a display device according to a first embodiment of the present invention is shown.
[0026] like figure 1 As shown, the display device 1000 of the first embodiment of the present invention includes a pixel array 1100 , a gate driving circuit 1200 , a source driving circuit 1300 and other control circuits (not shown). Among them, the gate driving circuit 1200 is used to provide a plurality of scanning signals G[1] to G[n] to the pixel array 1100, and the source driving circuit 1300 is used to provide a plurality of data signals D[1] to D[n] to the pixel array 1100. [m], where n and m are both non-zero natural numbers.
[0027] The pixel array 1100 includes a plurality of pixel units 1110 arranged in an array, and each pixel unit includes at least one thin film transistor TFT, a pixel electrode and a common electrode, and a pixel capacitance is formed between the pixel electrode and the common electrode. In each pixel unit, The drain of the thin film transistor TFT is connected to the pixel electrode, and the common electrode receives the common voltage Vcom.
[0028] In the pixel array 1100, the gates of the thin film transistors in the pixel units in the same column receive the same scanning signal (the “row” corresponds to the horizontal direction shown in the figure, for example, figure 1 The pixel units in the first row receive the scanning signal G[1], the pixel units in the last row receive the scanning signal G[n]), and the sources of the thin film transistors in the pixel units in the same column receive the same data signal (the “column ” for example corresponds to the portrait orientation shown in the figure, for example figure 1 The leftmost column of pixel units receives the data signal D[1], and the rightmost column of pixel units receives the data signal D[m]).
[0029] It should be noted, figure 1 Only some connections between or inside the circuits in the display device are shown, and those skilled in the art can obviously replace the structure of the pixel unit with other structures not described in this embodiment according to the prior art or common knowledge.
[0030] The gate drive circuit 1200 has an integrated gate drive structure (Gate Driver in Array, GIA) to realize the narrow frame of the display device, that is, the gate drive circuit 1200 includes a plurality of GIA circuits, and each GIA circuit includes at least a plurality of transistors T (preferably a thin film transistor), each GIA circuit outputs a corresponding scanning signal to each row of pixel units, so that each row of pixel units in the pixel array 1100 is turned on row by row.
[0031] Each GIA circuit and the pixel array 1100 are integrated on the first surface of the substrate 1600. The first surface of the substrate 1600 has a first area for forming the pixel array 1100 and a second area for forming each GIA circuit, wherein the second area can be Located on one side of the first area, it can also be located on both sides of the first area (such as figure 1 shown) or have other positional relationships, all do not affect the implementation of the present invention.
[0032] figure 2 A schematic longitudinal section of the first embodiment of the present invention in the second region is shown. Wherein, “longitudinal” refers to a direction perpendicular to the first surface of the substrate 1600 .
[0033] like figure 2 As shown, the display device 1000 of the first embodiment of the present invention has a substrate 1600, a first metal layer 1410, a first insulating layer 1420, a semiconductor layer 1430, a second metal layer 1440, and a second insulating layer 1450 stacked in sequence in the longitudinal direction. , the second conductive layer 1460 , the third insulating layer 1470 and the first conductive layer 1480 . Wherein, the first metal layer 1410, the first insulating layer 1420, the semiconductor layer 1430 and the second metal layer 1440 are used to form each transistor (for example including figure 2 The thin film transistor T1 shown). As an example, the first metal layer 1410 is used to form the gate of the transistor, the second metal layer 1440 is used to form the source and drain of the transistor, and a buffer layer may also be included between the first metal layer 1410 and the substrate 1600 .
[0034] The material of the substrate 1600 is, for example, light-transmitting materials such as polyimide, quartz or glass.
[0035] The first metal layer 1410 is disposed on the first surface of the substrate, and its material may be metals such as copper, aluminum, silver, molybdenum, chromium, neodymium, nickel, manganese, titanium, tantalum, tungsten, and alloys of these metals. The present invention does not Without special limitation, the gate is preferably made of copper.
[0036] The first insulating layer 1420 serves as the gate insulating layer of each transistor in the gate driving circuit, and its material is preferably silicon oxide or organic resin. The use of organic resin as the gate insulating layer can form a flatter upper surface, preventing the oxide semiconductor layer from being affected by the roughness of the gate. Moreover, the use of the organic resin as the grid insulating layer can be applied to a flexible process to prepare a flexible display device.
[0037] The semiconductor layer 1430 is preferably an oxide semiconductor, amorphous silicon (a-Si), polycrystalline silicon (p-Si), or the like.
[0038] The material of the second metal layer 1440 is, for example, metals such as copper, aluminum, silver, molybdenum, chromium, neodymium, nickel, manganese, titanium, tantalum, tungsten and alloys of these metals, or composed of multilayer metal stacks.
[0039] The material of the second insulating layer 1450 is, for example, silicon nitride, parylene, polyvinyl alcohol and the like.
[0040] Please refer to Figure 3-6 , the first conductive layer 1480 includes a conductor structure 1481 for shielding each GIA circuit, the material of the conductor structure 1481 is, for example, a transparent conductor material such as indium tin oxide, and since the gate drive circuit 1200 is located in the non-display area, so the material of the conductor structure can also be an opaque metal material, alloy or laminated metal film.
[0041] In the first conductive layer, the conductor structure 1481 is grounded or receives a set voltage. As an embodiment, the conductor structure 1481 is short-circuited with the common electrode in the pixel array 1100 to receive the common voltage Vcom. It can be seen that, since the conductor structure 1481 disposed in the first conductive layer is located above the transistors in each GIA circuit, is insulated from the entire gate drive circuit, and is grounded or receives a set voltage, the conductor structure 1481 can prevent each The GIA circuit receives interference from other circuits, and at the same time, it can prevent each GIA circuit and other circuits from interfering, that is, the conductor structure 1481 realizes the shielding of the GIA circuit.
[0042] In this embodiment, there are a plurality of first connection points in the first metal layer, and a plurality of second connection points in the second metal layer, and the first connection points and the corresponding second connection points in a connection relationship utilize vertical The through hole realizes the electrical connection.
[0043] In view of the fact that the display device can be realized through various manufacturing processes, the conductor structure in the first conductive layer will be described below for several possible manufacturing processes. It should be noted that those skilled in the art can obviously replace the three processes in the following description with other processes, so various other processes are within the protection scope of the present invention.
[0044] image 3 , Figure 5 as well as Image 6 A schematic partial longitudinal cross-sectional view of a second region of a display device according to an embodiment of the present invention under different manufacturing processes is shown. Figure 4 Shows image 3 top view diagram.
[0045] image 3 The shown display device has only one through-hole process in the manufacturing process, and the through-hole process is implemented when the third insulating layer 1470 is formed or after the third insulating layer 1470 is formed, so that the through-hole 1501 ends at the first metal layer 1410 or The second metal layer 1440 . It can be seen that each via hole 1501 can electrically connect the first conductive layer 1480 with the first metal layer 1410 or the second metal layer 1440 at a corresponding point. Therefore, the first connection point in the first metal layer 1410 having a connection relationship and the corresponding second connection point in the second metal layer 1440 can be bridged in the connection region 1482 of the first conductive layer 1480 by using the via hole 1501 . Specifically, for example, a GIA circuit includes thin film transistors T1 and T2, and the drain of thin film transistor T1 has a connection relationship with the gate of thin film transistor T2, so the drain of thin film transistor T1 and the gate lead T2_G of thin film transistor T2 can be respectively The two vias 1501 are bridged by the conductor material in the connection region 1482 of the first conductive layer 1480 .
[0046] In this case, the conductor structure 1481 in the first conductive layer 1480 is laid over the second region of the substrate 1600, and is hollowed out at each connection region 1482 to insulate from the conductor material used for bridging in each connection region 1482 isolation (eg Figure 4 shown), so that each GIA circuit is shielded by the conductor structure 1481. The conductor material used for bridging in the connection region 1482 is the same as the material in each through hole 1501 and the conductor structure 1481 .
[0047] It should be noted that, since the gate drive circuit 1200 integrated on the same substrate 1600 and the thin film transistors in the pixel array 1100 generally have the same manufacturing process, the display device of this embodiment includes a first conductive layer 1480, a second conductive layer 1460 and a third insulating layer 1470 between them. However, in other embodiments, the second conductive layer 1460 and the third insulating layer 1470 may be omitted.
[0048] Figure 5 The shown display device has two through-hole processes in the manufacturing process to form the first through-hole 1502a and the second through-hole 1502b. The first via hole process is implemented when the first insulating layer 1420 is formed or after the first insulating layer 1420 is formed, so that the first via hole 1502a ends at the first metal layer 1410; the second via hole process is formed after the second insulating layer 1450 or after forming the second insulating layer 1450 , so that the second via hole 1502 a ends at the second metal layer 1440 .
[0049] It can be seen that the corresponding points in the second metal layer 1440 and the first metal layer 1410 can be directly electrically connected through the first through hole 1502a, therefore, the first connection point in the first metal layer 1410 having a connection relationship and the corresponding The second connection point located in the second metal layer 1440 can be directly electrically connected by using the first via hole 1502a. Specifically, for example, a GIA circuit includes thin film transistors T1 and T2, and the drain of thin film transistor T1 has a connection relationship with the gate of thin film transistor T2, so the drain of thin film transistor T1 and the gate lead T2_G of thin film transistor T2 can pass through One first through hole 1502a is directly electrically connected.
[0050] In this case, the conductor structures 1481 in the first conductive layer 1480 are laid over the second region of the substrate 1600 so that the GIAs are shielded by the conductor structures 1481 .
[0051] Image 6 The shown display device has only one through-hole process in the manufacturing process, and the through-hole process is implemented when the second insulating layer 1450 is formed or after the second insulating layer 1450 is formed, so that the through-hole 1503 ends at the first metal layer 1410 or The second metal layer 1440 . It can be seen that each via hole 1503 can electrically connect the second conductive layer 1460 with the first metal layer 1410 or the second metal layer 1440 at a corresponding point. Therefore, the first connection point in the first metal layer 1410 having a connection relationship and the corresponding second connection point in the second metal layer 1440 can be bridged in the second conductive layer 1460 by using the via hole 1503 . Specifically, for example, a GIA circuit includes thin film transistors T1 and T2, and the drain of thin film transistor T1 has a connection relationship with the gate of thin film transistor T2, so the drain of thin film transistor T1 and the gate lead T2_G of thin film transistor T2 can be respectively It is bridged in the second conductive layer 1460 by a via 1503 .
[0052] In this case, the conductor structures 1481 in the first conductive layer 1480 are laid over the second region of the substrate 1600 so that the GIAs are shielded by the conductor structures 1481 .
[0053] The beneficial effect of the embodiment of the present invention is that by setting the conductor structure in the conductive layer to ground or receive the set voltage to realize the shielding of each GIA circuit in the display device, since the manufacturing process is not changed, it can be improved without increasing the cost. The anti-interference ability of the GIA circuit is improved, and at the same time, the interference of the GIA circuit to other circuits such as the touch device is weakened, thereby ensuring the display effect of the display device and improving the performance of the entire display device and other devices connected to the display device.
[0054] It should be noted that in this article, relational terms such as first and second etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is a relationship between these entities or operations. There is no such actual relationship or order between them. Furthermore, the term "comprises", "comprises" or any other variation thereof is intended to cover a non-exclusive inclusion such that a process, method, article, or apparatus comprising a set of elements includes not only those elements, but also includes elements not expressly listed. other elements of or also include elements inherent in such a process, method, article, or device. Without further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article or apparatus comprising said element.
[0055] Embodiments according to the present invention are described above, and these embodiments do not describe all details in detail, nor do they limit the invention to only the specific embodiments described. Obviously many modifications and variations are possible in light of the above description. This description selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can make good use of the present invention and its modification on the basis of the present invention. The invention is to be limited only by the claims, along with their full scope and equivalents.
