Low-power-dissipation FPGA self-adaption loading method and system

An adaptive, low-power technology, applied in program loading/starting, data processing power supply, program control devices, etc., can solve the problems of large internal resource consumption and high power consumption of FPGA, so as to reduce power consumption, improve flexibility, cost reduction effect

Active Publication Date: 2017-12-08
XIDIAN UNIV
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AI Technical Summary

Problems solved by technology

[0006] The purpose of the present invention is to overcome the defect that above-mentioned prior art exists, has proposed a kind of FPGA self-adaptive loading method and system of low power consumption, in order to solve the problem that FPGA power consumption is high and internal resource consumption is big in existing loading method technical problem

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  • Low-power-dissipation FPGA self-adaption loading method and system

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Embodiment Construction

[0037] Below in conjunction with accompanying drawing and specific embodiment, the present invention is described in further detail;

[0038] refer to figure 1 , one A low-power FPGA adaptive loading method, comprising the following steps:

[0039] Step 1) Compile a plurality of configuration files with different functions, each configuration file includes FPGA function realization module, FPGA function detection module and FPGA adaptive loading module, and the external processing module sets the initial address of each configuration file according to the size of each configuration file , and according to the initial address of each configuration file, pack multiple configuration files with different functions to obtain the total configuration file, and write it into the configuration information storage module;

[0040]In this embodiment, each configuration file is an FPGA function module. The FPGA function module includes an FPGA function realization module, an FPGA funct...

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Abstract

The invention provides a low-power-dissipation FPGA self-adaption loading method and system. The low-power-dissipation FPGA self-adaption loading method and system are used for solving the technical problems existing in an existing loading method that an FPGA is high in power dissipation and a large number of internal resources are consumed. An external processing module packs multiple configuration files with different functions to obtain a total configuration file, and the total configuration file is written into a configuration information storage module; a target FPGA automatically loads a first configuration file from the configuration information storage module to achieve initial configuration; an FPGA function detection module detects the matching features of external input data and a current configuration file, and if the external input data is matched with the current configuration file, the target FPGA enters a normal work mode; if the external input data is not matched with the current configuration file, a self-adaption re-loading process is triggered, the next configuration file is loaded, and after the configuration is completed, the detection step is repeated. The low-power-dissipation FPGA self-adaption loading method and system can effectively lower the power dissipation of the FPGA and the consumption of the internal source of the FPGA.

Description

technical field [0001] The invention belongs to the technical field of digital signal processing, and relates to an FPGA loading method and system, in particular to an FPGA self-adaptive loading method and system, which can be used in the fields of communication, image processing, energy transportation and the like. Background technique [0002] FPGA is a programmable signal processing device. Users can define its functions by changing configuration information to meet design requirements. Compared with traditional digital circuit systems, FPGA has the advantages of programmable, high integration, high speed, and high reliability. By configuring the logic functions and input and output ports inside the device, the original circuit board-level design is placed on the chip. , improve circuit performance, reduce the workload and difficulty of printed circuit board design, and effectively improve the flexibility and efficiency of design. With the complexity and diversification ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/445G06F1/32
Inventor 王海秦红波杨泽江宫璐涯刘建华赵伟
Owner XIDIAN UNIV
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