Array substrate and manufacturing method thereof and liquid crystal panel

Abstract

The invention discloses an array substrate and a manufacturing method thereof and a liquid crystal panel. According to the method, a color ring resistance pattern is designed, and vent holes not running through the color ring resistance pattern are formed, a passivation layer on the color ring resistance pattern is provided with via holes which are communicated with vent holes for gas in the color ring resistance pattern to escape from. Based on this, the array substrate and the manufacturing method thereof and the liquid crystal panel help to discharge the gas inside the color ring resistance pattern and reduce the risk of bubbles appearing on the liquid crystal panel.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to an array substrate, a manufacturing method thereof, and a liquid crystal panel. Background technique [0002] The liquid crystal panel based on COA (Color Filter on Array, color filter array) technology is prone to produce bubbles (bubbles) when it hits. The vias of transistors overlap, and the PV layer (Passivation, passivation layer) at the overlapping position is etched away, causing the gas in the color resistance pattern to precipitate from the overlapping position after the box forming process and form Bubbles. The improvement countermeasure is to expand the color resistance The via size of the pattern makes it not overlap with the TFT via, but this will reduce the penetration rate. The second is that during the vibration process, due to the cracking of the PV layer, the gas in the color resistance pattern is precipitated to form bubbles. The improvement counterme...

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Problems solved by technology

[0002] The liquid crystal panel based on COA (Color Filter on Array, color filter array) technology is prone to produce bubbles (bubbles) when it hits. The vias of transistors overlap, and the PV layer (Passivation, passivation layer) at the overlapping position is etched away, causing the gas in the color resistance pattern to precipitate from the overlapping position after the box forming process and form Bubbles. The improvement countermeasure is to expand the color resistance The size of the via hole of the pattern so that it does not overlap with the TFT via hole, but this will reduce the penetration rate

The second is that during the vibration process, due to the cracking of the PV layer, the gas in the color resistance pattern is precipitated to form bubbles. The improvement countermeasure is to open a small-sized vent hole on the color resistance pattern, and the gas in the color resistance pattern passes through the vent hole. It is discharged before the box forming process, but the etching rate of the color resist pattern is lower than that of the PV layer, and the gas cannot be precipitated due to insufficient etching depth.

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