Method for establishing transistor noise model capable of scaling along with offset

Abstract

The invention relates to the technical field of semiconductor integrated circuit manufacture, and discloses a method for establishing a transistor noise model capable of scaling along with offset. Themethod comprises the following steps that: measuring the direct current IV features of a transistor, selecting a direct current IV model, and using the direct current IV model to fit tested direct-current IV data to obtain an accurate direct-current IV model; on the basis of the accurate direct-current IV model, calculating the small signal model parameter of the transistor to obtain the small signal model of the transistor; on the basis of the accurate direct current IV model, obtaining the noise current sources of the drain electrode and the grid electrode of the transistor, and correlationthereof; and importing the drain electrode noise current source and the grid electrode noise current source of the transistor and the correlation thereof into the small signal model of the transistor, and calculating four noise parameters of the transistor. Therefore, a modeling process is greatly simplified, modeling time is greatly shortened, the method is simple and efficient, is high in accuracy and is easy in expansion.

Description

technical field [0001] The invention relates to the technical field of semiconductor integrated circuit manufacturing, and in particular, to a method for establishing a transistor noise model that scales with bias. Background technique [0002] In the design of integrated circuits, it is not only necessary to use the device model to simulate the circuit topology to verify whether the designed circuit structure meets the index requirements, but also to put forward relevant performance requirements for the device process according to the design index of the circuit; , which not only controls the repeatability of the process according to the parameter values ​​of the relevant components in the device equivalent circuit model, but also optimizes the device design process according to the extracted device equivalent circuit parameters to further improve the performance of the integrated circuit. Nowadays, with the increase of chip design index requirements and circuit operating f...

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Problems solved by technology

[0004] In order to solve the cumbersome and time-consuming technical problems in the establishment method of the transistor noise model in the prior art, the present invention further provides a transistor noise model establishment method that scales with the bias

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