A device for realizing clock and reset control chip working mode

Abstract

The invention provides a device for implementing a clock and reset control chip working mode, which is used for selecting and switching a universal working mode and / or a DFT working mode; the device comprises a clock PAD-CLOCK input pin and a reset PAD-RESETN control pin, wherein the device further comprises a clock stabilizing circuit module clk-stable, a frequency division module clk-div, a filtering circuit rst-filter, a debugging controller debug-wrappper and a reset stabilizing circuit module rst-stable, the debugging controller debug-wrappper comprises a state corresponding table and ani2c-slv logic unit. Therefore, the device only uses the clock PAD-CLOCK input pin and the reset PAD-RESETN control pin to realize the control chip working mode, filters unnecessary reset pulses on thepremise of stable input clock to obtain expected input, and obtains a stable control signal via the i2c-slv protocol, so that the chip works in a specific mode.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to the logic design of chip hardware, and in particular to a device for realizing clock and reset control chip working modes. Background technique [0002] The working modes of semiconductor chips can be divided into: ordinary (various functions), design for testability (Design for Testability, referred to as DFT) mode), DFT mode is a kind of integrated circuit design technology, DFT working mode usually includes scan_mode, bist_mode, bsd_mode And / or bypass_mode, which implants some special structures into the circuit during the design stage, so that it can be tested after the design is completed. However, it is sometimes not easy to test the internal circuit of a semiconductor chip, because many internal node signals of the circuit are difficult to test and control externally, usually by adding testability design structures, such as scan chains, etc., internal signals c...

AI Technical Summary

Problems solved by technology

[0004] However, the external pin PAD_IO of mass-produced chips in the industry is a precious resource, especially for the benchmark chip, it is impossible to add a new external pin PAD_IO when implementing the DFT test function.

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