Write tracking followability detection method and circuit, and memory including the circuit

Abstract

The invention provides a writing tracking following performance detection method and circuit and a memory comprising the circuit. The writing tracking following performance detection method comprisesthe following steps that: providing a writing tracking unit, a time delay unit and a virtual storage unit; detecting whether the virtual storage unit is subjected to write failure or not; when the virtual storage unit is not subjected to the write failure, taking the output of the writing tracking unit as the output of a feedback signal; and when the virtual storage unit is subjected to the writefailure, carrying out time delay on the output of the writing tracking unit through the time delay unit as the output of the feedback signal. By use of the writing tracking following performance detection method and circuit and the memory comprising the circuit, writing tracking following performance can be detected. When a writing tracking path is quicker than practical writing, the time delay isadded into the writing tracking path, so that a word line is guaranteed to have enough starting time, and the storage unit is protected from the write failure.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a write tracking followability detection method and circuit and a memory including the circuit. Background technique [0002] With the continuous improvement of manufacturing technology, the size of semiconductor memory devices has become smaller and faster, and the power consumption has also been significantly reduced. In modern nanoscale semiconductor devices, due to unfavorable factors such as manufacturing process, voltage, temperature (PVT), etc., the original design of the same transistor will have different degrees of deviation, process deviation, etc. have a significant impact on circuit performance, and increase The difficulty of simulating the overall circuit. Due to the existence of process deviation, different memory cells have different data writing and reading speeds, resulting in inconsistency in timing. Coupled with changes in voltage and temperature...

AI Technical Summary

Problems solved by technology

In the existing write tracking circuit, under the low-voltage condition of the slow NMOS fast PMOS (Slow NMOS Fast PMOS, SNFP) process corner, the write tracking path is faster than the actual writing, which will cause the word line turn-on time of the write cycle to be too short. Worst case can lead to memory cell write failure

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