Semiconductor device packaging structure and packaging method thereof
A device packaging and packaging structure technology, applied in the field of microelectronics, can solve the problems of high thermal resistance and conduction voltage drop of semiconductor devices, low production efficiency of semiconductor devices, unfavorable heat dissipation of semiconductor devices, etc., to reduce thermal resistance and conduction voltage Reduce, reduce packaging complexity, reduce the effect of contact surface
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[0036] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.
[0037] An embodiment of the present invention provides a semiconductor device packaging structure, such as Figure 5 to Figure 10 As shown, including a tube cover 11 and a tube base 12, the tube cover 11 is covered on the tube base 12, a plurality of first electrode molybdenum sheets 13 are welded on the lower surface of the tube cover 11, and a plurality of first electrode molybdenum sheets 13 are welded on the upper surface of the tube base 12. Two electrode...
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