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A Voltage Dump Circuit Applied to Multi-cell Battery Voltage Sampling

A voltage sampling and dumping circuit technology, applied in battery circuit devices, multiple synchronous battery arrangements, charge equalization circuits, etc., can solve problems such as unfavorable circuit integration, complex circuit structure, narrow input voltage range, etc., to improve single The effect of chip integration, increased compatibility, and improved common-mode voltage range

Active Publication Date: 2022-05-13
BEIJING MXTRONICS CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The traditional voltage dump circuit is realized by high-voltage technology, the differential mode input voltage is easily limited by the threshold voltage of the PMOS transistor, the input voltage range is narrow, and the circuit structure is relatively complicated, which is not conducive to the further integration of the circuit

Method used

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  • A Voltage Dump Circuit Applied to Multi-cell Battery Voltage Sampling
  • A Voltage Dump Circuit Applied to Multi-cell Battery Voltage Sampling

Examples

Experimental program
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Embodiment Construction

[0019] figure 1 It is a schematic diagram of a voltage dump circuit, including a voltage dump sampling control circuit and a voltage dump switch circuit. When the input voltage VI+ and VI- are applied to the circuit and stabilized, if VI+ is greater than VI-, the voltage at point A V A Due to the clamping of PMOS transistor P4, the gate-source voltage is higher than VI-, if VI+ is less than VI-, V A It is a gate-source voltage higher than VI+. Assuming that VI is the minimum value of VI+ and VI-, the gate-source voltage of PMOS transistor P4 is V GSP4 , then there are:

[0020] V A =VI+V GSP4

[0021] In steady state, V A A gate-source voltage is lowered through the NMOS transistor N4 to obtain V B , depending on the clamping mechanism of the diode, V B A diode turn-on voltage drop V is reduced by Zener diode D1 D , thus obtaining the dump control voltage V C , assuming that the gate-source voltage of NMOS transistor N4 is V GSN4 , then there are:

[0022] V C =V...

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Abstract

The invention is a voltage dump circuit applied to multi-cell battery voltage sampling, which adopts the voltage clamping principle when the MOS tube works in a steady state, realizes sampling the voltage of the battery positive terminal and the battery negative terminal, and then uses the charge pump to control the dump At the same time, according to the principle of charge balance at both ends of the capacitor, the sampled high voltage is converted into a low voltage and transmitted to the subsequent circuit to realize voltage signal processing. This circuit can not only realize the voltage sampling of the single cells in the series battery pack from top to bottom, but also realize the sampling of the voltage of any single cell in the series battery pack, and it is not affected by the number of batteries in series within the acceptable power supply range of the circuit. constraint. The circuit structure of the invention is simple and has good compatibility with the BCD process, and is suitable for a voltage acquisition circuit of multiple series batteries.

Description

technical field [0001] The invention relates to a voltage dump circuit, which is characterized in that it can realize the collection of voltages of multiple batteries in series, the input voltage of differential mode does not exceed 5V, the input voltage of common mode does not exceed the maximum working voltage of the circuit, and the voltage is not limited by the number of batteries connected in series dump circuit. Background technique [0002] The voltage dump circuit is an important part of the high-voltage sampling circuit, and is often used in battery management chips for voltage sampling of multiple batteries connected in series. In the voltage dump circuit, the voltage dump sampling control circuit is mainly used to clamp the common-mode input voltage corresponding to the position of different series battery packs, realize the sampling of the battery voltage, and generate the dump control signal through the boost principle of the charge pump , the dump control sign...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H02J7/00G01R31/396G01R31/385G01R19/00
CPCH02J7/0019G01R31/396G01R31/385G01R19/0084
Inventor 莫艳图田岭王宗民孔瀛柏晓鹤胡文瑞李阳
Owner BEIJING MXTRONICS CORP