IO interface ESD leakage protection circuit

Abstract

The invention discloses an IO interface ESD leakage protection circuit comprising a control switch circuit used for controlling the on or off of the switch according to voltages on a sending terminal,a receiving terminal and an ESD diode node, wherein the first end of the control switch circuit is connected with a sending terminal power source VCC1, the second end of the same is connected with the cathode of the first diode of the ESD diode, and the third end of the same is connected with a receiving terminal power source VCC2 via a common terminal of the first diode and the second diode of the ESD diode and a terminating resistor, and the anode of the first diode is connected with the cathode of the second diode. The IO interface ESD leakage protection circuit provided by the invention interpedently segments the power source of the ESD diode, so that the controllable switch can be turned off when ensuring that the sending terminal is out of power, so as to prevent leakage current from flowing into a main power rail, the discharging path passing through the ESD diode is disconnected, the unnecessary leakage power consumption is reduced, and the service life of the IO chip is improved.

Description

technical field [0001] The invention relates to the technical field of circuit design, in particular to an IO interface ESD leakage protection circuit. Background technique [0002] In special cases, current can flow through a leakage path from the receiving end of the front-end receiving circuit, such as a high-definition multimedia interface (HDMI) port of a monitor or TV, to an HDMI port such as a notebook or computer, through a transmission line (such as an HDMI cable) The transmission end of the front-end transmission circuit. Typically, receivers are enabled before transmitters. During circuit design, the ESD diode protection function is usually required on the IO interface of the chip to prevent external static electricity from damaging the internal structure of the chip. However, the ESD diode on the IO interface, in some applications, such as the TMDS driver level, will exist when the IO interface of the chip on the sending end is powered off, and the IO is still ...

AI Technical Summary

Problems solved by technology

[0004] For the leakage protection between the power supply Vcc1 of the sending end and the power supply Vcc2 of the receiving end, at present, the termination resistance and the current source are mainly closed, such as image 3 As shown, even if the leakage path of the driver stage itself is turned off, due to the ESD diode on the IO interface, when the power supply Vcc1 of the transmitting end drops to the diode conduction voltage after the power supply is cut off, the ESD diode will still conduct and there will still be leakage It is impossible to ensure that the leakage current path is completely cut off, causing unnecessary leakage power consumption and reducing the service life of the IO chip

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