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tft device and manufacturing method

A strip and resist technology, used in the field of manufacturing display devices, can solve problems such as source-drain leakage

Inactive Publication Date: 2021-03-12
NEDERLANDSE ORG VOOR TOEGEPAST NATUURWETENSCHAPPELIJK ONDERZOEK TNO
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

It is known to use an undercut etch process to remove the semiconductor layer also under the edge of the gate electrode, which in turn may cause source-drain leakage around the gate

Method used

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  • tft device and manufacturing method
  • tft device and manufacturing method

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Experimental program
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Embodiment Construction

[0031] figure 1 Flowchart showing the TFT device fabrication process. In a first step 11 of the process a substrate is provided, on which substrate there are parallel strips of semiconductor film. figure 2 A top view of a portion of such a substrate with strips 22 is shown. image 3 A side view of such a substrate 20 is shown with a semiconductor strip 22 on top of the substrate. The surface of the substrate 20 that is in contact with the strips 22 is a material that electrically insulates the strips from each other. For reference purposes, the x, y coordinate axes will be used to designate the vertical horizontal direction parallel to the surface of the substrate 20, while the z coordinate axis will be used to designate the vertical axis perpendicular to the surface. Strip 22 is an elongated strip, wherein the length direction of the strip extends in the y-direction.

[0032] In the illustrated embodiment, all strips 22 have the same width and pitch in the x-direction (p...

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PUM

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Abstract

TFT devices are fabricated starting from a substrate with elongated strips of semiconductor material insulated from each other. A stack of layers is over the strip on the substrate, the stack including a gate electrode layer. A multi-level resist layer is provided over the gate electrode layer. The multilevel resist layer defines gate and source drain regions, with channels running in a direction parallel to the stripes. The gate portion in the resist layer spans the source drain region in the resist layer beyond the source drain region on either side by a distance at least equivalent to the pitch of the stripe.

Description

technical field [0001] The present invention relates to methods of fabricating devices comprising thin film transistors (TFTs), and to methods of fabricating display devices. Background technique [0002] TFTs are used in devices such as LCD display panels. A TFT contains a channel in the form of a thin film of semiconductor material in a channel region on a substrate and a conductive gate, the channel being separated from the semiconductor material by an insulating layer. Either a top gate or a bottom gate can be used, where the semiconductor material is interposed between the gate and the substrate, or the gate is interposed between the semiconductor material and the substrate, respectively. The gate spans the channel region, defining source and drain regions in the channel region on either side of the gate. [0003] US 7,341,893 describes a method of manufacturing devices with such transistors by means of imprinting, known as the SAIL process (Self-Aligned Imprint Litho...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/786H01L29/423H01L29/66
CPCH01L29/42384H01L29/66757H01L29/7869H01L29/78696H01L21/308H01L29/66742
Inventor 布赖恩·哈迪·科布
Owner NEDERLANDSE ORG VOOR TOEGEPAST NATUURWETENSCHAPPELIJK ONDERZOEK TNO