A power-off storage type simon encryption circuit
An encryption circuit, storage type technology, applied in encryption device with shift register/memory, protection of storage content to prevent loss, electrical components, etc. loss, etc.
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Embodiment 1
[0023] Embodiment one: if Figure 1 to Figure 7As shown, a power-off storage type SIMON encryption circuit includes two n-bit shift registers, two n-bit serial-to-parallel circuits and an n-bit memristor-based ciphertext generation circuit, n is an integer greater than or equal to 1 , the output end of the first n-bit shift register is connected to the input end of the first n-bit serial-to-parallel circuit, the output end of the second n-bit shift register is connected to the input of the second n-bit serial-to-parallel circuit terminal connection, each bit based on the memristor-based ciphertext generation circuit includes a column mixing module, a first waveform adjustment module, a round key encryption module and a second waveform adjustment module; the column mixing module includes the first and second input AND gate A1, the second The one-two-input AND gate A1 includes a first memristor M1 and a second memristor, the input end of the first memristor M1 is the first input...
Embodiment 2
[0025] Embodiment 2: This embodiment is basically the same as Embodiment 1, the difference is only in this embodiment, such as Figure 8 As shown, each n-bit shift register includes n first D flip-flops with the same structure, the first D flip-flop has a setting terminal, a clock terminal, an input terminal and an output terminal, and the setting of the n first D flip-flops The bit end is connected and its connection end is the setting end of n-bit shift register, the clock end of n first D flip-flops is connected and its connection end is the clock end of n-bit shift register, the first first D flip-flop The input terminal of the device is the input terminal of the n-bit shift register, the output terminal of the m first D flip-flop is connected with the input terminal of the m+1 first D flip-flop, m=1, 2,..., n -1, the output terminal of the nth first D flip-flop is the output terminal of the n-bit shift register.
[0026] Such as Figure 9 As shown, each n-bit serial-to-...
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