Data reading method and device

Abstract

The application provides a data reading method and device. The method includes: allowing a processor device to determine that a first store writing command is present after a first load reading command, wherein a physical address visited by the first load reading command is identical with that visited by the first store writing command; allowing the processor device to send the first load readingcommand with additional information to a cache management device, wherein the additional information is used for indicating that executing the first store writing command is required after the first load reading command is executed for the physical address, such that the cache management device, according to the first load reading command with the additional information, sends to a primary memorymanagement device, a reading-writing request message to request for reading and writing operation upon the physical address. The data reading method and device enable communications overhead during the compliance process to be reduced, thereby reducing communications complexity.

Description

Technical field [0001] This application relates to the computer field, and more specifically, to a method and device for reading data in the computer field. Background technique [0002] In a multi-processor system, each processor has its own expanded memory, and the processors form a multi-processor system through interconnection interfaces. Most modern processors use a cache mechanism to store data in the shared storage space of the main memory. Data is stored in a local cache to speed up the acquisition of data by the multi-processor core. The main memory manages the data access of its storage space through the main memory management device, and the processor manages the data access of its cache through the cache management device. When a multi-threaded application program runs in a multi-processor system, multiple threads usually run in different processor cores. When multiple processors share a certain data in the storage space of the main memory, their access to the data (...

AI Technical Summary

Problems solved by technology

[0005] It can be seen that for a complete Read-Modify-Write process, the cache management device of a certain processor needs to issue two cache coherence requests (ReadShared and Upgrade_StoE) to complete the process, and the Read-Modify-Write process is applied It is very common in the program process, so if the main memory includes multiple processors, the communication overhead will be very large for the cache management device and the main memory management device, so the communication complexity is also high

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