Eureka AIR delivers breakthrough ideas for toughest innovation challenges, trusted by R&D personnel around the world.

Method and system for implementing data protection of non-volatile memory chip

A non-volatile memory and data protection technology, applied in the field of storage systems, can solve problems such as data loss, and achieve the effects of short stay time, reliable design principles, and wide application prospects

Inactive Publication Date: 2018-10-12
ZHENGZHOU YUNHAI INFORMATION TECH CO LTD
View PDF5 Cites 4 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] Protecting data is a very important index for storage systems. The non-volatile memory chip NVDIMM can save data so that it will not be lost when the system is powered off. It will trigger the CPU to flash the data to the DRAM of the non-volatile memory chip NVDIMM, and the SAVE signal will be triggered only after the data is flushed to the DRAM of the non-volatile memory chip NVDIMM after reaching the set fixed time, which may easily cause data loss

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method and system for implementing data protection of non-volatile memory chip
  • Method and system for implementing data protection of non-volatile memory chip
  • Method and system for implementing data protection of non-volatile memory chip

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0039] Such as figure 1 , figure 2 As shown, a method for realizing data protection of a non-volatile memory chip comprises the following steps:

[0040] Step 1: The PSU of the system power supply module is abnormal or powered off, and the PSU sends a power-off signal AC_Fail

[0041] to the programmable logic device of the system;

[0042] Step 2: After the programmable logic device receives the power-down signal AC_Fail, it triggers the asynchronous DRAM

[0043] The refresh signal ADR_Trigger# is sent to the PCH chip, the counter in the PCH chip starts timing, and the PCH chip transmits the received asynchronous DRAM refresh signal to the CPU through the power management synchronization signal PM_SYNC;

[0044] Step 3: After the CPU receives the refresh signal, refresh the data of the protection buffer ADR protected buffers to the DRAM of the non-volatile memory chip NVDIMM;

[0045] Step 31: After the CPU receives the refresh signal, it uses the rest of the filter cap...

Embodiment 2

[0056] Such as image 3 As shown, a system for realizing data protection of a non-volatile memory chip includes a CPU 1 and a PCH chip 2, and the CPU 1 is connected to the PCH chip 2;

[0057] The PCH chip 2 is connected with a non-volatile memory chip NVDIMM 5, and the non-volatile memory chip NVDIMM5 is provided with a DRAM, and the CPU1 is connected with the DRAM;

[0058] The PCH chip 2 is also connected to a programmable logic device 3 , and the programmable logic device 3 is connected to a power supply module PSU 4 .

[0059] PCH chip 2 is connected to CPU1 through PM_SYNC signal;

[0060] A GPIO interface is defined on the PCH chip 1 for receiving the refresh completion signal, and the GPIO interface of the PCH chip 2 is connected to the CPU1.

Embodiment 3

[0062] A system for realizing data protection of a non-volatile memory chip, comprising a CPU 1 and a PCH chip 2, the CPU 1 being connected to the PCH chip 2;

[0063] The PCH chip 2 is connected with a non-volatile memory chip NVDIMM 5, and the non-volatile memory chip NVDIMM5 is provided with a DRAM, and the CPU1 is connected with the DRAM;

[0064] The PCH chip 2 is also connected to a programmable logic device 3 , and the programmable logic device 3 is connected to a power supply module PSU 4 .

[0065] PCH chip 2 is connected to CPU1 through PM_SYNC signal;

[0066] A GPIO interface is defined on the PCH chip 1 for receiving the refresh completion signal, and the GPIO interface of the PCH chip 2 is connected to the CPU1; the programmable logic device 3 is a CPLD chip.

[0067] A method for realizing non-volatile memory chip data protection based on the above system, comprising the steps of:

[0068] Step 1: The PSU of the system power supply module is abnormal or powere...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to a method and a system for implementing data protection of a non-volatile memory chip, comprising the following steps: step 1: a system power supply module PSU is abnormal or powered off, and the PSU sends a power failure signal to a programmable logic device of the system; step 2: after receiving the power failure signal, the programmable logic device triggers an asynchronous DRAM renewed signal to a PCH chip, and the PCH chip transmits the received asynchronous DRAM renewed signal to a CPU; step 3: after receiving the asynchronous DRAM renewed signal, the CPU refreshes the protection buffer data to DRAM of a non-volatile memory chip NVDIMM; step 4: after finishing refreshing, the CPU sends a refreshing completion signal to the PCH chip, the PCH chip sends the refreshing completion signal to the non-volatile memory chip NVDIMM and triggers ''SAVE ''; and the data in the DRAM are saved in the non-volatile memory chip NVDIMM.

Description

technical field [0001] [The present invention belongs to the technical field of storage systems, and specifically relates to a method and system for realizing data protection of non-volatile memory chips. Background technique [0002] Protecting data is a very important index for storage systems. The non-volatile memory chip NVDIMM can save data so that it will not be lost when the system is powered off. It will trigger the CPU to flash the data to the DRAM of the non-volatile memory chip NVDIMM, and the SAVE signal will be triggered only after the data is flashed to the DRAM of the non-volatile memory chip NVDIMM after reaching the set fixed time, which may easily cause data loss. This is the weak point of prior art. Contents of the invention [0003] The purpose of the present invention is to provide and design a method and system for realizing data protection of non-volatile memory chips in order to solve the above-mentioned technical problems. [0004] In order to ac...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/14
CPCG06F11/1441
Inventor 邱星萍
Owner ZHENGZHOU YUNHAI INFORMATION TECH CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com