86 results about "NVDIMM" patented technology

The invention discloses a power-down protection method for a memory device based on an NVDIMM (non-volatile dual in-line memory module), and belongs to the power-down protection method of the memory device, which is used for solving a data loss problem when a system is powered down abnormally in the prior art and a problem that the existing power protection way is short in storage time, high in battery capacity demand, and complex in system realization. According to the power-down protection method for the memory device based on the NVDIMM disclosed by the invention, the NVDIMM is adopted in the memory device, and the state of a system power supply is detected by a logic control circuit; the NVDIMM is noticed when the system power supply is powered down accidentally, and storage for data is completed by the NVDIMM; when the system power supply is restored, the NVDIMM memorizes the data stored in last power-down in an internal memory, and a computer system continuously operates from a position on which power is down accidentally last time, so that power-down protection for the memory device is realized.

Methods and apparatus for effecting a processor- and platform-assisted NVDIMM solution using standard DRAM and consolidated storage. The methods and apparatus enable selected data in DRAM devices, such as DIMMs to be automatically copied to a persistent storage device such as an SSD in response to detection of a power unavailable event or an operating system error or failure without any operating system intervention. In one aspect, a platform includes a power supply and a temporary power source, such as a capacitor-based energy storage device, a small battery, or a combination of the two, either integrated in the power supply or separate. When power becomes unavailable, the temporary power source is use to continue to provide power to selected components in one or more power protected domains. The energy stored in the temporary power source is sufficient to temporarily power the components to enable DRAM data to be written to the persistent storage device. Upon system restart, the previously-stored DRAM data is restored to one or more DRAM devices from which the data was originally copied.

A graceful shutdown of a computer system is initiated by sending a command to an asynchronous dynamic random access memory refresh (ADR) trigger device to assert an ADR trigger. Responsive to the command, the ADR trigger device asserts the ADR trigger to initiate an ADR of a non-volatile dual in-line memory module (NVDIMM) of the computer system. In response to the ADR trigger being asserted by the ADR trigger device, an ADR of the NVDIMM is performed before completing the graceful shutdown of the computer.

A system and method for boot speed optimization is discussed. Uncompressed copies of UEFI firmware volumes and OS boot loader files stored on a portion of an NVDIMM are used during a boot sequence in a computing platform. The cached copies on the NVDIMM are used during the boot sequence after a successful validation check is performed to provide faster boots of the computing platform.

The embodiment of the invention discloses a data protecting method, device and system, and relates to the field of data protection. The reliability of the system for protecting data can be improved. The method comprises the steps that a PCH receives feedback information sent after a CPU completes ADR process; the PCH sends an ADR completion message to an NVDIMM after receiving the feedback information, wherein the ADR completion message is used for indicating the NVDIMM to conduct backup electricity switching and data protection. The data protecting method, device and system are applied to NVDIMM data protection.

The invention discloses NVDIMM (Non-Volatile Dual In-line Memory Module)-based write cache allocation and release methods and apparatuses. According to the write cache release method, a write cache internally comprises one or more idle storage spaces; and a data structure is provided for indexing the one or more idle storage spaces. The method comprises the steps of searching whether the storage space connected with the first storage space is the idle storage space or not in response to operation of receiving a request of releasing the first storage space of the write cache; if the first idle storage space connected with the first storage space is found, modifying a first node which indexes the first idle storage space in the data structure to enable the first node to index the first idle storage space and the first storage space; and if the first idle storage space connected with the first storage space is not found, adding a new node to the data structure so as to index the first storage space.

The invention relates to the field of nonvolatile storage and in particular provides a nonvolatile dual-in-line memory and storage method. According to the invention, when a system suffers power failure, the NVM capacity for data backup is greatly less than that of the conventional NVDIMM, so that the price of the NVDIMM, the capacity of super-capacitors, and the calorific value can be greatly reduced, which are a great improvement for a data center employing a great number of NVDIMMs.

The invention discloses method, which includes: according to the NVDIMM memory allocation request, the state symbol of corresponding process is installed to be the NVDIMM memory allocation, and the ID information of the process is ontained. The ID information is transmitted to a kernel. According to the ID information, memory is allocated by the kernel for the process in the NVDIMM memory. The memory of users' programs which are important for users can be allocated on the NVDIMM. So data of users can be preserved well when the abnormal conditions such as power-off occur. A linux system application program memory management system also has above-mentioned beneficial effects.

The invention discloses a method for protecting CPU Cache data after AC power failure. The method comprises the steps that a CPLD sends a data protection command to a CPU after receiving AC power failure information; and the CPU flashes data in a CPU Cache to a non-volatile storage medium after receiving the data protection instruction, thereby performing a subsequent ADR process after finishing the flashing. According to the method provided by the invention, the data in the CPU Cache can be effectively protected after the AC power failure only by adding the process of flashing the data in theCPU Cache to the non-volatile storage medium after the AC power failure on the premise of not changing the read-write performance of the non-volatile storage medium, so that the data in the CPU Cacheis protected from being not lost, the read-write performance of NVDIMM-N or other non-volatile storage mediums is not influenced, and the delay is shortened. The invention furthermore discloses a system for protecting the CPU Cache data after the AC power failure. The system also has the abovementioned beneficial effects, which are no longer repeated here.

The invention discloses a method and a system for memory management. The system and the method for using a Non-Volatile Dual In-Line Memory Module (NVDIMM) is disclosed. The NVDIMM can support two or more access modes. An application can specify which access mode is desired for an address space requested by the application. A Non-Volatile Memory (NVM) governor can store an address mask and the access mode for the address space in an NVM control register. When the application requests read or write access to an address, the NVM governor can compare the requested address with the address masks in the NVM control register, determine the access mode from the access mode corresponding to the matched address mask, and use that access mode to satisfy the request for the address.

The invention discloses NVDIMM (Non-Volatile Dual In-line Memory Module)-based data writing and caching methods and apparatuses. The NVDIMM-based data writing method comprises the steps of receiving a first data writing request, wherein the first data writing request indicates that first data is written in a first address; in response to operation of receiving the first data writing request, writing the first data in an NVDIMM; in response to the completion of the operation of writing the first data in the NVDIMM, sending a message which indicates the completion of the first data writing request; in response to the operation of receiving the first data writing request, writing the first data in a storage device; and in response to the completion of the operation of writing the first data in the storage device, releasing the storage space occupied by the first data in the NVDIMM.

The invention discloses a power failure protection system and method based on an NVDIMM (Non-Volatile Dual In-line Memory Module). The system comprises a power failure triggering module and a data protection register module, wherein the power failure triggering module acquires a level of a power supply module, judges whether power failure occurs according to change of the level, and directly triggers the NVDIMM to carry out power failure protection if yes, and simultaneously, the data protection register module records a power failure state when receiving a power failure signal of an operation system; the data protection register module records a power failure protection result state of the NVDIMM; and the data protection register module, according to the recorded state, triggers the NVDIMM to copy data subjected to power failure protection to an RAM (Random Access Memory) when receiving a power recovery signal of the operation system. When a power failure is to be generated, the NVDIMM cannot be transferred and triggered to carry out power failure protection by an ADR (Address Register) function of a CPU (Central Processing Unit); a data protection record is achieved by the register; an ADR and a BIOS (Basic Input Output System) do not need to be used; universality is good; and the NVDIMM can be conveniently and efficiently enabled to carry out power failure protection.

The invention particularly relates to a method for automated testing of NVDIMM data protection stability. The method has the advantages that the method is innovative, highly practical and convenient to operate, and is capable of testing NVDIMM data protection stability effectively through data backup and recovery, so that the gap of automated NVDIMM testing methods is filled, and stability and safety of server products are guaranteed.

The invention discloses method and system for triggering NVDIMM-N backup during normal shutdown. The present application takes into account that the operating state parameters of the server system atthe time of normal shutdown, sudden power-down and forced shutdown are different, and determines whether the shutdown is normal or not by obtaining the operating state parameters of the server systemat the time of shutdown, and triggers the NVDIMM-N to carry out data backup. By using this method, the server system can backup data when it shuts down normally, which ensures the integrity of data. When the server is turned on again after shutting down normally, the OS will trust NVDIMM-N, the backup data will be directly from the NVDIMM-N, the speed of data recovery and boot-up is improved, andthe reliability of the system is improved. The invention also discloses a device and the system for triggering NVDIMM-N backup during normal shutdown and have the same beneficial effects as the methoddescribed above.

A volatile memory data save subsystem may include a coupling to a shared power source such as a chassis or rack battery, or generator. A data save trigger controller sends a data save command toward coupled volatile memory device(s) such as NVDIMMs and PCIe devices under specified conditions: a programmable amount of time passes without AC power, a voltage level drops below normal but is still sufficient to power the volatile memory device during a data save operation, the trigger controller is notified of an operating system shutdown command, or the trigger controller is notified of an explicit data save command without a system shutdown command. NVDIMMs can avoid reliance on dedicated supercapacitors and dedicated batteries. An NVDIMM may perform an asynchronous DRAM reset in response to the data save command. Voltage step downs may be coordinated among power supplies. After data is saved, power cycles and the system reboots.

The invention provides a heterogeneous memory management system based on NVDIMM. The system comprises: a user management module used for acquiring user command information and realizing the interaction with the NETLINK communication module to obtain the kernel process message, executing operation on the user state link list according to the user command information, and sending a user message to the NETLINK communication module, and executing operations on the user mode link list according to the kernel process message; a NETLINK communication module used for receiving user message, realizingthe interaction with the NVDIMM memory management module to obtain the kernel process information, feeding back the kernel process message to the user management module; a NVDIMM memory management module used for realizing memory allocation; further, for a particular process, the NVDIMM memory management module is reached through a page-missing exception, and memory allocation is implemented. Theinvention can realize the flexible adjustment of the structure and the management strategy of the heterogeneous memory system, and has a broad application prospect.

The invention discloses an NVDIMM (Non-Volatile Dual In-line Memory Module) interface data read-write device for splitting a CACHE. In the method, a controller splits a DRAM (Dynamic Random Access Memory) into a DRAM_A and a DRAM_B; the controller enables any one of the split DRAM_A and DRAM_B to be under a data state and enables the other one to be under a command accepting state through a signalaccessory channel; when a host transmits data to a NVDIMM, the host has two states of connecting with the DRAM or the controller; when the host is connected with the controller, the host is under a command sending state; and when the host is connected with the DRAM, the host is under a data transmission state. The host of the invention is connected with any one of the following two states at anytime, wherein the first state is the DRAM_A and the DRAM_B of all capacity, and the second state is the DRAM_A (or the DRAM_B) of 1 / 2 capacity; after exchange is finished, switching is carried out forswitching time of the 100-nanosecond level, and the use ratio of the host for memory can be improved.

The invention provides a method for performing an NVDIMM function test under a shell and relates to the field of computer server technology. The method comprises the steps that an NVDIMMtest.efi tool is placed in a USB flash disk, and the USB flash disk is connected with a to-be-tested server; the server is powered on and started up to enter the shell, and the position of the test tool in the USB flash disk is found; and NVDIMMtest.efi is run, and multiple tests can be performed through options. The data protection function of an NVDIMM can be verified easily and effectively, and the security and stability of the server can be guaranteed.

The invention discloses an NVDIMM-F-based storage method. The method comprises the following steps of: when a CPU receives to-be-stored data, sending the to-be-stored data to an NVDIMM-F; and storingthe to-be-stored data by the NVDIMM-F. According to the method provided by the invention, the to-be-stored data is directly sored in the NVDIMM-F, so that the speed of transmitting the to-be-stored data is greatly enhanced. The NVDIMM-F has a solid-state high-capacity memory NAND Flash mapped to a memory address space, and the data is directly stored in the NVDIMM-F, so that compared with the manner of downloading the to-be-stored data into storage mediums such as solid-state disks SSD through PCIe buses, the speed of the method is greatly enhanced. The invention furthermore provides an NVDIMM-F-based storage system which also has above effects.

The invention discloses a backup method of a storage server system, which comprises the following steps: after receiving a Power off command, setting an ADR register of a CPLD through a PCH; the datain the memory controller being refreshed into the DRAM of the NVDIMM by the CPLD control CPU, and the data in the DRAM being saved into the NAND FLASH after the refresh is completed. After receiving the Power off command, the invention triggers the backup function of the NVDIMM through the interaction of the south bridge PCH and the CPLD, thus ensuring that the data stored in the NVDIMM can be safely backed up and not lost when the storage server system is shut down, thereby enhancing the reliability of the storage server system. The invention also discloses a backup system of a storage serversystem, a storage server system and a readable storage medium, which have the beneficial effects mentioned above.

The invention relates to a method and a system for implementing data protection of a non-volatile memory chip, comprising the following steps: step 1: a system power supply module PSU is abnormal or powered off, and the PSU sends a power failure signal to a programmable logic device of the system; step 2: after receiving the power failure signal, the programmable logic device triggers an asynchronous DRAM renewed signal to a PCH chip, and the PCH chip transmits the received asynchronous DRAM renewed signal to a CPU; step 3: after receiving the asynchronous DRAM renewed signal, the CPU refreshes the protection buffer data to DRAM of a non-volatile memory chip NVDIMM; step 4: after finishing refreshing, the CPU sends a refreshing completion signal to the PCH chip, the PCH chip sends the refreshing completion signal to the non-volatile memory chip NVDIMM and triggers ''SAVE ''; and the data in the DRAM are saved in the non-volatile memory chip NVDIMM.

The embodiment of the invention discloses a method and a device for testing an NVDIMM outage protection function. The method comprises the steps of building a partition for an NVDIMM, and mounting thepartition under a test folder; copying a test file to the test folder, and turning off the power supply of a server during a copying process; and turning on the server after set time, comparing MD5 values before and after the test file is copied, and judging the outage protection function of the NVDIMM. According to the method and device provided by the invention, whether the data protection function of the NVDIMM is correct is judged through comparing the MD5 values before and after the test file is copied, the operation is simple, the data protection function of the NVDIMM can be quickly learned, and the test efficiency is improved,

The invention relates to the technical field of storage of single controllers, in particular to a method for implementing single controller storage. iSCSI (Internet Small Computer System Interface) read-write operation is cached and optimized through a Cache module pair implemented by an IET (iSCSI Enterprise Target) module, and data protection and recovery in a system abnormal power failure state are implemented with a NVDIMM (Non-Volatile Dual In-line Memory Module). The implementation method is simple, reliable, low in cost and excellent in performance, and high-performance and high-reliability single controller storage can be implemented.

The invention provides a data processing method and device based on a hybrid memory. The method is applied to a node in a distributed storage system. The distributed storage system comprises a plurality of nodes which are in communication connection with one another, wherein each node comprises an HFDD and an external memory, the HFDD comprises an internal memory and a solid state disk SSD, the internal memory comprises a random access memory RAM and an NVDIMM, the method comprises the following steps: calculating the popularity of each data, and the popularity represents the access frequencydegree of the corresponding data; and storing the data according to the popularity of the data and the storage capacities respectively corresponding to the memory, the SSD and the external memory. Inthe embodiment of the invention, the HFDD is fault-tolerant distributed data abstraction based on the RAM + NVM hybrid memory, and the data is stored according to the heat of the data, so that on onehand, the storage capacity of the memory is improved, and on the other hand, the data access efficiency is improved.

The invention relates to a test method and system for a power-down protection function of a storage server mainboard. The test method and system are applied to a storage server supporting an NVDIMM. The method comprises the steps that before power-down of the storage server mainboard, first data is written into a memory space of the NVDIMM through an memset2.efi command; the storage server mainboard is powered down; after a certain time threshold of a time interval, the storage server mainboard is powered on again; second data in the memory space of the NVDIMM is output through an memcheck2.efi command, and the first data is compared with the second data; and if the first data and the second data are identical, it is judged that the power-down protection function of the storage server mainboard is qualified, and otherwise it is judged that the power-down protection function of the storage server mainboard is not qualified. The system comprises a data writing module, a power-down control module, a secondary power-on module, a data output and comparison module and a power-down protection function judgment module. The test method and system are high in test coverage, good in test portability, easy to operate and convenient to popularize.

The invention discloses a mainboard design method capable of supporting a NVDIMM (Non-Volatile Dual In-line Memory Module), and belongs to the technical field of computer memory. The mainboard design method capable of supporting the NVDIMM comprises the following steps: a 12V power supply is imported to the NVDIMM from a CPU (Central Processing Unit) power supply position, software is compiled into a complex programmable logic device and is matched with the own software of the NVDIMM, the complex programmable logic device sends a command to an accident data recorder after the complex programmable logic device detects that a system is in outage, information is successively transferred to a precompiled header and the CPU to finish updating the own state of the NVDIMM, and the precompiled header emits the command of the accident data recorder to finish storing the data. The mainboard design method capable of supporting the NVDIMM does not need to change the memory slot of a mainboard, is convenient and simple in operation, guarantees the high-speed data access capability of a computer, does not cause data loss after outage and has a favorable popularization and application value.

The invention discloses a Linux operating system sleep quick starting method based on an NVDIMM and relates to the field of memory technology utilization. Sleep mirror images originally needing to bestored to SWAP disk subareas are stored on an NVDIMM medium through utilization of the NVDIMM medium; the NVDIMM memory medium is divided into the disk subareas in a simulation mode; and the corresponding disk subareas are set as SWAP subareas. When STD (Suspend to Disk) of the system sleeps, the mirror images are stored to the NVDIMM memory medium, the read / write speed obtained through utilization of the NVDIMM memory medium is superior to a disk medium, and when the system is waked up, the starting speed is rapidly improved.

A computing device includes a processor and a non-volatile dual in-line memory module (NVDIMM) connected to the processor. The NVDIMM includes a first memory having a first processing speed and a first storage capacity, a second memory having a second processing speed lower than the first processing speed and a second storage capacity larger than the first storage capacity, and a controller that evicts or fetches data between the first memory and the second memory. When the processor recognizes a first situation to evict data or a second situation to prefetch data, the processor transmits a command including first information of a logical address of data associated with the first situation or the second situation, second information of a length of the data associated with the first situation or the second situation, and third information indicating the first situation or the second situation to the NVDIMM.