Convolutional-neural-network accelerating system based on field-programmable gate array

A convolutional neural network and acceleration system technology, applied in the field of algorithm hardware acceleration platform, can solve problems such as lowering the development threshold, and achieve the effects of low power consumption, high energy efficiency gains, and improved hardware resource utilization.

Inactive Publication Date: 2018-10-16
SUZHOU INST FOR ADVANCED STUDY USTC
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Problems solved by technology

More importantly, there are more and more FPGA-based development t

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  • Convolutional-neural-network accelerating system based on field-programmable gate array
  • Convolutional-neural-network accelerating system based on field-programmable gate array
  • Convolutional-neural-network accelerating system based on field-programmable gate array

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Embodiment

[0054] The convolutional neural network acceleration system in the embodiment of the present invention includes a general-purpose processor, a field programmable gate array, and a storage module, wherein the data path between the FPGA and the general-purpose processor can use the PCIe bus protocol, the AXI bus protocol, and the like. The data path in the drawings of the embodiments of the present invention is illustrated by using the AXI bus protocol as an example, but the present invention is not limited thereto.

[0055] figure 1 It is the overall structural diagram of the acceleration system of the embodiment of the present invention. As shown in the figure, the entire accelerator system is mapped to the same FPGA chip, and DDR3DRAM is used as the external memory of the accelerator system. Processor is a RISC soft core, which is responsible for starting the accelerator, communicating with the host, and measuring time. The AXI4-Lite bus is used for command transmission, and...

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Abstract

The invention discloses a convolutional-neural-network accelerating system based on a field-programmable gate array. The convolutional-neural-network accelerating system comprises a general processor,the field-programmable gate array, a storage module, a data bus and a control bus, wherein the general processor is a soft core of a reduced instruction set, and is responsible for starting an accelerator, being in communication with a host terminal, conducting time measurement and the like; a DDR3 DRAM serves as an external storage of the accelerator system; an AXI4-Lite bus is used for demand transmission, and an AXI4 bus is used for data transmission; the field-programmable gate array comprises multiple processing engines (PE), and each processing engine adopts a most-suitable fragment unfolding strategy to correspond to calculation of one layer in the convolutional neural network; all the processing engines are mapped onto a same FPGA chip, and therefore different layers can simultaneously work in a production line mode. Compared with an existing convolutional-neural-network accelerating system, the convolutional-neural-network accelerating system based on the field-programmable gate array can obtain higher energy efficiency benefit.

Description

technical field [0001] The invention relates to an algorithm hardware acceleration platform, in particular to a field programmable gate array-based convolutional neural network acceleration system with good versatility and high flexibility and a design method thereof. Background technique [0002] Convolutional neural network (CNN) belongs to artificial neural network, which is a feed-forward deep neural network, which has been widely used in character recognition, image classification and natural language understanding. [0003] Due to the specific calculation method of convolutional neural network, it is not efficient on general-purpose processor (CPU), and it is difficult to achieve high performance. In practice, graphics processing units (GPUs) are widely used in training and classification tasks of convolutional neural networks, however, it is limited by low energy efficiency gains. In addition to GPU being applied to convolutional neural network acceleration, convolut...

Claims

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Application Information

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IPC IPC(8): G06N3/04
CPCG06N3/045
Inventor 李曦周学海王超孙凡万波
Owner SUZHOU INST FOR ADVANCED STUDY USTC
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