A Method for Optimizing Impedance Discontinuities at High-Speed Link Capacitance
A high-speed link and continuity technology, applied in the server field, can solve problems such as incomplete reference planes, affecting current flow distribution, and affecting signal transmission quality, so as to optimize impedance discontinuity, small impedance changes, and improve signal transmission quality Effect
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[0021] like Figure 1-5 as shown, figure 1 A flow chart of a method for optimizing impedance discontinuity at a high-speed link capacitance proposed by the present invention; figure 2 It is the wiring length diagram of each section of the high-speed link; image 3 It is the simulation diagram of the link time domain reflectometer with the transition area A1 being 80ohm and A2 being 83ohm; Figure 4 It is the link time domain reflectometer simulation diagram of the transition zone A1 is 87ohm, A2 is 90ohm and A1 is 93ohm, A2 is 95ohm; Figure 5 It is a partial enlarged view and impedance measurement of the high-speed link time domain reflectometer.
[0022] The present invention will be described in detail below in conjunction with the accompanying drawings and embodiments.
[0023] A method of optimizing impedance discontinuity at high-speed link capacitance, comprising the steps of:
[0024] S1: Divide the wiring in the PCIE high-speed link into the outgoing line L1 of ...
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