Permutation and write-back adaptive buffer region management method

A management method and buffer technology, which is applied in the field of replacement and write-back adaptive buffer management, can solve the problems of indiscriminate hot and cold data pages, poor performance, singleness, etc., achieve high cache hit rate, improve Overall performance and lifetime, the effect of reducing the number of additional block erases

Active Publication Date: 2018-11-20
HANGZHOU DIANZI UNIV
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Problems solved by technology

However, these block-level buffer methods only cache write requests, and their performance is not good in a load environment dominated by read requests.
In addition, these block-level cache methods do not distinguish between hot and cold data pages in the same write-back block when dirty pages are written back, resulting in some hot data pages being written back prematurely, and at the same time, the underlying flash memory conversion cannot be sensed when writing back Layer (Flash Translation Layer, FTL) garbage collection pressure, using a single write-back strategy, resulting in additional garbage collection overhead for the FTL layer

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  • Permutation and write-back adaptive buffer region management method
  • Permutation and write-back adaptive buffer region management method
  • Permutation and write-back adaptive buffer region management method

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Embodiment Construction

[0063] In order to enable those skilled in the art to better understand the technical solutions of the present invention, the present invention will be described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0064] In order to further describe the invention in detail, it is first necessary to define the concepts related to the present invention:

[0065] Cache data page: The basic read and write unit of the cache, which is consistent with the physical page size of the flash memory.

[0066] Cache data block: The data request page address is divided by the physical block size to obtain a set of consistent data pages. The maximum number of pages contained in the data block is consistent with the number of physical pages contained in the underlying physical block.

[0067] Logical page address: the logical page number (LogicalPage Number, LPN) of the host I / O request P according to the identifier of its file system.

[0068]...

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Abstract

The invention provides a permutation and write-back adaptive buffer region management method. A buffer region is divided into a buffer block record table, a writing buffer region and a reading bufferregion. The buffer block record table is used for recording location information of data pages belonging to the same logical block in the buffer region, the writing buffer region is used for caching adata page that has been modified in response to a write request, and the reading buffer region is used for caching a data page that has not been modified in response to the read request. According tothe method, a page-level management mode is adopted in loading and erasing the data pages, by periodically and adaptively adjusting a reading buffer region threshold, the change of loading reading and writing characteristics can be sensed, thus the management method can obtain a higher cache hit rate under various load conditions. At the same time, dirty page adaptive clustering write back is used, the pressure of FTL layer garbage collection can be sensed, a write-back strategy can be adaptively adjusted, the number of extra block erasures caused by FTL garbage collection can be effectivelyreduced, and the overall performance and service life of a solid state disk is improved.

Description

technical field [0001] The invention belongs to the technical field of firmware optimization method design based on a flash memory solid state disk, and discloses a replacement and write-back self-adaptive buffer management method. Background technique [0002] Toshiba Corporation proposed a new type of non-volatile storage medium - NAND flash memory (flashmemory) in 1989. This storage medium is widely used in embedded devices because of its high performance, low power consumption, and good shock resistance. Laptops and enterprise-class storage systems. The flash memory mentioned in this article is NAND flash memory. [0003] The buffer is an integral part of the storage system. By storing frequently accessed data in a small-capacity cache, the I / O performance of the storage system can be effectively improved. For decades, researchers have proposed many classic and effective buffer methods for storage systems with mechanical hard disks as the main storage medium, such as F...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/02G06F12/0866
CPCG06F12/0253G06F12/0866G06F2212/7205
Inventor 姚英彪周杰颜明博
Owner HANGZHOU DIANZI UNIV
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