A semiconductor device package structure and method

A packaging method and device packaging technology, which are applied in semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve problems such as uneven electrical distribution and low heat dissipation capacity, and achieve improved reliability and good heat dissipation Function, the effect of good self-protection function

Active Publication Date: 2018-12-11
GLOBAL ENERGY INTERCONNECTION RES INST CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The technical problem to be solved by the present invention is to provide a power semiconductor device for the phenomenon of uneven distribution of force and electricity caused by the processing tolerance of rigid materials in the power semiconductor device chip packaging process in the prior art, as well as the phenomenon of low heat dissipation. Device packaging structures and methods to improve package reliability and heat dissipation

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  • A semiconductor device package structure and method
  • A semiconductor device package structure and method
  • A semiconductor device package structure and method

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Embodiment Construction

[0024] The technical solutions of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Apparently, the described embodiments are part of the embodiments of the present invention, but not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0025] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" etc. The indicated orientation or positional relationship is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the referred device or element must have a specific orientation, ...

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Abstract

A semiconductor device package structure and method are provided. The package structure includes: a first electrode sheet; A second electrode sheet disposed opposite to the first electrode sheet; A semiconductor device chip disposed between the first electrode sheet and the second electrode sheet; Supporting member, provided on the side of the semiconductor device chip, so as to form a cavity between the semiconductor device chip, the first electrode sheet and the support member and / or the semiconductor device chip, the second electrode sheet and the support member, and the support member hasa through hole penetrating through the support member and communicating with the cavity. When the semiconductor device is in use, a conductive fluid is injected into the cavity through a through holeon the supporting part, thereby effectively improving the reliability of the device package. The structure has good heat dissipation effect on semiconductor device chip. At the same time, the structurehas good self-protection function, once the liquid leaks, the upper electrode or the lower electrode will automatically open circuit with the chip.

Description

technical field [0001] The invention relates to the field of semiconductor device packaging, in particular to a semiconductor device packaging structure and method. Background technique [0002] In recent years, rigid crimp packaging has become the main packaging method for high-power semiconductor device chips. Rigid crimp packaging mainly consists of two metal molybdenum sheets directly contacting the front and back of the chip. contact resistance between them. The rigid crimp package has: a compact design with a good connection between the device surface area and the package surface area, the device can achieve double-sided cooling, and there is no lead connection, which can avoid the thermal fatigue caused by the lead connection and lead to desoldering failure. Problems, short circuit occurs when the device fails, it is convenient for series redundancy design, simple installation, small parasitic parameters and other advantages. [0003] Since the chip itself of the se...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/10H01L23/043H01L23/22H01L23/473H01L21/52
CPCH01L21/52H01L23/043H01L23/10H01L23/22H01L23/473
Inventor 崔磊张璧君吴鹏飞金锐潘艳温家良吴军民田丽欣
Owner GLOBAL ENERGY INTERCONNECTION RES INST CO LTD
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