A Transient Voltage Suppressor with Low Voltage and Low Capacitance Triggering Characteristics
A technology of transient voltage suppression and triggering characteristics, applied in the direction of electric solid devices, circuits, electrical components, etc., can solve the problems of large parasitic capacitance and weak anti-surge robustness, reduce parasitic capacitance and trigger voltage, improve Current bleeder capability, the effect of reducing device area
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[0023] Below in conjunction with accompanying drawing and specific embodiment the present invention is described in further detail;
[0024] The present invention proposes a transient voltage suppressor with low-voltage and low-capacitance trigger characteristics. By embedding diodes and NMOS, a series-parallel current path of auxiliary SCR is formed to reduce the trigger voltage of the device, reduce the area of the device, and reduce the parasitic capacitance of the device. , Enhance the ESD protection or anti-surge function of the device.
[0025] Such as figure 1 The schematic cross-sectional structure of the device of the present invention shown is specifically a transient voltage suppressor with low-voltage and low-capacitance trigger characteristics, which is characterized in that: the transient voltage suppressor mainly includes: P substrate 101, N well 102, P well 103, first P+ implant region 104, first N+ implant region 105, second P+ implant region 106, second N+...
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