A thyristor rectifier double genlock trigger control method
A technology of trigger control and double synchronization, applied in the direction of pulse technology, pulse generation, electrical components, etc., can solve problems such as jitter, inaccurate zero-crossing inspection of thyristor rectifier trigger circuit, etc.
Active Publication Date: 2022-08-09
HUBEI UNIV OF TECH
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Problems solved by technology
[0005] The purpose of the present invention is to solve the problem of inaccurate and jittery inspection of the zero-crossing point of the thyristor rectification trigger circuit due to the distortion and serious interference of the voltage waveform of the power grid, and propose a method for synchronizing the internal synchronization time base with the phase-locked synchronization of the power grid, using a phase-locked loop Tracks mains frequency and phase with adjustable phase, resulting in an internal synchronous time base that is phase-locked to the grid voltage
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[0046] 1. First, the specific method principle of the present invention is introduced.
[0047] The first synchronization is set as the synchronization between the internal synchronization time base and the actual grid voltage zero crossing:
[0048] Collect zero crossings and find the time difference:
[0049] The external zero-crossing detection circuit continuously detects the zero-crossing point of the grid voltage after simple filtering, and the circuit captures the zero-crossing time, which is recorded as t k , and at the same time shield multiple zero-crossing signals generated in less than one cycle including circuit interference, voltage distortion, etc., so that only one effective zero-crossing signal is generated per power cycle. The zero-crossing time t of each capture k with the last capture time t k-1 Find the difference to get the power cycle, which is T k =t k -t k-1 .
[0050] Filtered output power cycle:
[0051] Inaccurate or jittery capture time due...
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The invention relates to the technical field of power electronics and genlock, in particular to a control method for triggering dual genlock of silicon controlled rectifiers. The invention adopts a phase-locked loop to track the frequency and phase of the power supply, and the phase is adjustable, so as to generate an internal synchronization time base that is phase-locked with the grid voltage, and the phase of the trigger pulse time base and the internal synchronization time base is locked by the control circuit according to the α angle, Thus, the timing of the trigger pulse is adjusted, and the trigger pulse corresponding to each thyristor is sent out at equal intervals according to the trigger interval through the pulse distribution; the use of the dual-synchronization adjustment mode can ensure that the zero-crossing point can still be accurately tracked in the case of grid voltage distortion. The deviation signal adjusts the phase of the trigger angle and suppresses the problem of zero-crossing jitter.
Description
technical field [0001] The invention relates to the technical field of power electronics and genlock, in particular to a dual genlock trigger control method. Background technique [0002] The thyristor rectifier circuit has trigger conduction conditions when the thyristor is subjected to forward voltage. Under the condition of a certain grid voltage, the output voltage is determined by the control angle α, and the stability and accuracy of the control angle α determines the thyristor rectifier circuit. output voltage stability. During the working process of the silicon controlled rectifier, due to the waveform distortion of the grid voltage and the existence of various interference signals in the detection circuit, the zero-crossing point will jitter, resulting in the jitter of the zero-crossing signal that determines the trigger pulse. The trigger pulse also jitters, resulting in unstable output voltage. [0003] Traditional trigger pulse control: filter the synchronizati...
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IPC IPC(8): H03K3/011H03K3/356
CPCH03K3/011H03K3/356026Y02E40/30
Inventor 潘健冯雨丝李坤熊亦舟黎家成梁佳成尤润川张慧马浩许章茁成玉爽
Owner HUBEI UNIV OF TECH