21 results about "Performance limit" patented technology

In some implementations, a memory apparatus may transmit, to a host system, capability information indicating one or more supported memory operations of the memory apparatus. The memory apparatus may receive, from the host system, configuration information indicating one or more performance limits for at least one supported memory operation of the one or more supported memory operations.

Integrated circuit devices, methods, and circuitry for dynamically limiting a rate of performance of an integrated circuit device is provided. This may allow an integrated circuit to remain within performance limits, such as those found in export controls. An integrated circuit device may include data utilization circuitry to perform arithmetic operations and a performance monitor circuit. The performance monitor circuit may selectively throttle the data utilization circuitry to maintain a performance rate of the data utilization circuitry to within a maximum average limit over an accumulation window of a leaky accumulator circuit.

There is provided a vibration test device capable of accurately performing self-diagnosis related to the state of the vibration test device, including a failure determination, a failure prediction, and a performance limit determination of the vibration test device. A vibration test device 200 including a shaker 100 configured to shake a shaker table 48, includes: a drive controller 120 configured to control drive of the shaker 100 by controlling current and voltage applied to the shaker 100; a current detector 171 configured to detect the current that controls vibration of the shaker 100; a voltage detector 172 configured to detect the voltage that controls vibration of the shaker 100; a motion detector 135 configured to detect physical quantities related to a motion of the shaker table 48; and a determiner 134 configured to perform a determination related to a state of the vibration test device 200, including a failure determination, a failure prediction, and a performance limit determination, based on detection signals from the current detector 171, the voltage detector 172, and the motion detector 135.

The disclosed technology includes bat comprising a first hollow barrel, a second hollow barrel disposed in the first hollow barrel and spaced a distance apart from the first hollow barrel, and a compressible material disposed between the first hollow barrel and the second hollow barrel. The disclosed technology further includes a bat, which has a hollow barrel and an internal assembly configured to resist deformation of the hollow barrel. The internal assembly includes a rod disposed longitudinally in the hollow barrel, a ring attached to the rod, a deformable sleeve (a second hollow barrel) disposed around the ring and extending longitudinally in the hollow barrel. The bat can include a compressible material disposed between the hollow barrel and the deformable sleeve.

The invention relates to a land slope sea area weak signal passive detection performance limit analysis method based on space-frequency focusing processing, and the method comprises the following steps: 1, dividing a receiving array into two sub-arrays, and obtaining sub-array receiving signals; step 2, constructing steering vectors of the two sub-arrays; step 3, calculating beam output of the two sub-arrays, and constructing a frequency domain vector; and step 4, constructing a frequency domain steering vector based on the arrival time delays of the four main sound rays arriving at the sound shadow area. The method is suitable for underwater acoustic transponder target intensity measurement lake / sea tests, the far-field condition is easily met, the measurement method is convenient and efficient, and the method conforms to the actual use scene.

A computer system for determining one or more future performance limits for a battery electric vehicle, BEV, or hybrid electric vehicle, HEV, combination, the computer system comprising processing circuitry configured to acquire a desired operational window for a thermal property of one or more components of the vehicle combination, acquire an operating mode for the vehicle combination, and determine one or more future performance limits for the vehicle combination based on the desired operational window and the operating mode. A computer-implemented method is also disclosed.

The invention relates to the field of network control systems, in particular to a performance evaluation method for a bandwidth limitation network control system under hybrid attacks, which is realized based on a two-degree-of-freedom controller and comprises the following steps of: modeling denial of service attack and spoofing attack by utilizing a Bernoulli random process; obtaining a mathematical model of the bandwidth limitation network control system under the mixed attack; substituting the mathematical model into the tracking error signal to obtain a tracking error signal of the bandwidth limiting network control system under the hybrid attack; and obtaining a tracking error performance limit expression of the bandwidth limiting network control system under the hybrid attack according to the tracking error signal and the tracking error performance index of the bandwidth limiting network control system. According to the method, the optimal tracking performance of the system is obtained by using tools such as all-pass decomposition, partial fraction decomposition, dual Bezout equations, H2 space decomposition technologies and Youla parameterization of a controller, and the characteristics of the system and the influence of network attacks on the performance of the control system are quantitatively revealed.

This invention discloses a method and apparatus for performance testing of SPI NAND Flash chips. The method includes: using a complex programmable logic device (CPL) to control a level conversion module to generate several test signals for the chip under test (SUT), wherein the test signals include the access area, test voltage, and test frequency for reading / writing operations on the SUT, and the SUT is an SPI NAND Flash chip; performing read / write operations on the SUT using the test signals; and verifying the correctness of the read / write operation results. This invention can simulate numerous usage scenarios in a short time to quickly verify the various extreme performance limits of the SPI NAND Flash chip and whether it meets product usage requirements, thus greatly improving testing efficiency.

This invention discloses a method, system, device, and medium for performance bound analysis of intelligent agent game strategies. It models the unobservable portion of the opponent's state as a bounded parameter Markov decision process, which more realistically reflects the uncertainty in the game process than a typical Markov decision process, helping the agent make more informed decisions. The upper and lower bounds of performance are calculated using an iterative algorithm, providing a concrete analytical object for performance analysis.

The invention relates to the technical field of intelligent scheduling, in particular to a high-performance interface flow distribution method supporting intelligent scheduling. The method comprises the following steps: S1, analyzing the infrastructure condition of a current network, and determining the performance limit of network equipment according to historical fault records; s2, continuously monitoring and collecting indexes of a network interface, analyzing historical data, identifying a traffic mode and predicting a future trend of the traffic; s3, constructing a network flow model based on the collected index data, and simulating network behaviors and performance expressions under different distribution strategies; and S4, generating a flow distribution strategy by using an intelligent algorithm, performing a simulation test of the strategy in a simulation environment, and evaluating the effect of the strategy. According to the method, the flow path and the priority can be dynamically adjusted through a strategy for carrying out future trend prediction on the flow and generating an intelligent algorithm, it is ensured that key services and real-time applications obtain enough bandwidth resources, and therefore the system response speed and the overall service quality are improved.

The application belongs to the field of unmanned ship control, and relates to a preset performance path tracking control method and system for an underactuated unmanned ship. From the perspective of engineering practice, the application first designs an arctangent type path tracking preset performance guidance law at the kinematics level; then designs a virtual speed law, a preset time dynamics control law and a robust adaptive law at the dynamics level, so that the course tracking error is within the preset performance limit throughout the process. At the same time, the lateral error will also be within the preset limit at all times after meeting the preset performance condition, so as to achieve accurate tracking of the expected path. The designed control strategy can ensure the preset performance and preset time convergence of the system error, and ensure the safety of the unmanned ship when performing a task.

An embodiment of the application provides a cluster service capacity control method, an electronic device, a storage medium and a program product. The method comprises the following steps: obtaining a cluster service request; using a preset control algorithm to perform gradual pressure adjustment processing on the cluster service request, determining target capacity information corresponding to the cluster service request in the case of gradually approaching the performance limit of the device; and performing resource configuration on a terminal device according to the target capacity information, and executing the cluster service request. In this way, the capacity corresponding to the cluster service request can be dynamically adjusted, automatic adjustment of the capacity is realized, and resources are reasonably utilized.

The invention belongs to the technical field of memory performance testing, and particularly relates to a high-performance benchmark testing system and method for UFS equipment, testing equipment and a storage medium, and the high-performance benchmark testing system for the UFS equipment can accurately and stably measure the performance limit of the UFS equipment. Due to the fact that the test system is executed in a kernel mode, an uninterrupted pure IO polling engine model is adopted, and a software lock on an IO path is eliminated, the software stack expenditure is reduced to the maximum extent, performance data very close to the physical limit of a UFS storage hardware subsystem can be measured, and the precision of a test result is remarkably higher than that of a traditional test method; a strict environment locking mechanism is executed through the test environment management module, a highly consistent test environment is created, external interference is eliminated, and a test result has extremely high stability and repeatability.

The invention relates to the technical field of building earthquake resistance, and discloses a performance-based earthquake resistance design method for a steel frame-wood support mixed structure, which comprises the following steps: acquiring building basic information; a double-level-double-index performance target system is established, double levels comprise rare earthquake performance limit and frequent earthquake normal use, and double indexes comprise interlayer displacement angles of the overall structure of the building and strain of local components; determining structural performance constraints according to related laws and regulations, and selecting structural performance targets according to building requirements; establishing an initial structure model, and carrying out preliminary design and verification on the initial structure model to enable the initial structure model to meet structural performance constraints, so as to obtain a target structure reference model; establishing a mixed structure model based on the target structure reference model, and performing performance optimization on the mixed structure model until a structure performance target is met, so as to obtain a required complete structure model; the method has the advantages of being complete and reliable in design, clear and specific in performance target and sufficient in target quantification.

The invention relates to the technical field of security testing, and discloses a model performance testing method, device, equipment and medium, which are used for sending pressure data to a code task model, receiving GPU load, token processing efficiency and response time fed back by the code task model, and dynamically adjusting the pressure data to ensure reasonable utilization of hardware resources and explore limit performance of the model. When the GPU load is too high, the pressure is reduced, when the response time exceeds the standard, the user load capacity limit value is determined, when the token processing efficiency reaches the peak value, the maximum processing efficiency is determined, and finally the two key indexes serve as test results. According to the method, the pressure data is adjusted in a multi-gradient manner, so that the pressure data is closer to dynamic irregular fluctuation of concurrency in a real production environment, and the accuracy of a model test result is improved.

The invention discloses an FPGA (Field Programmable Gate Array) chip internal resource performance testing system and method, and belongs to the technical field of chip testing. A first FIFO cache unit; the excitation source is used for writing test data into the first FIFO cache unit in a slow clock domain, so that the first FIFO cache unit transmits the test data to a tested resource through a cross-clock domain synchronization mechanism, and then the tested resource processes the test data in a fast clock domain to generate output data; the second FIFO cache unit is used for receiving the output data in the fast clock domain and transmitting the output data to the check unit of the slow clock domain through a cross-clock domain synchronization mechanism; and the verification unit is used for outputting a test result mark in the slow clock domain. According to the invention, on the premise that the reliability of the excitation source and the verification unit is not influenced, the frequency is improved only for the tested resource DUT, so that the performance limit, such as the highest working frequency, of the tested resource DUT is accurately positioned.

The present invention relates to a storage device and an operating method thereof, the storage device can include a memory device including a temperature sensor, and a memory controller obtaining temperature information sensed by the temperature sensor at a temperature management period from the memory device, performing a performance limiting operation that limits a performance of the memory device according to the temperature information, calculating the temperature management period by using the temperature information, and updating the temperature management period by using history information about a performance history of the performance limiting operation.

The invention discloses a low-altitude safety corridor generation method and device based on unmanned aerial vehicle performance, and the method comprises the steps: dividing the unmanned aerial vehicle performance into three performance levels according to the performance data of all unmanned aerial vehicles in a target low-altitude airspace; constructing a three-channel low-altitude safety corridor corresponding to the performance grade and a whole-process operation rule of the unmanned aerial vehicle in the low-altitude safety corridor; a multi-objective optimization model of the low-altitude safety corridor is constructed, the maximum traffic capacity and the minimum operation risk are taken as objective functions, and the performance limit of the unmanned aerial vehicle is taken as a constraint condition; solving the multi-objective optimization model to obtain a final value of a decision vector; the decision vector comprises the channel width, the vertical height, the lower limit and the upper limit of the speed-limiting speed interval and the dynamic minimum longitudinal safety interval of each channel; and generating a low-altitude safety corridor according to the final value of the decision vector. By constructing a multi-channel and differentiated speed limiting rule, performance conflicts are effectively isolated, and the overall operation capacity and safety level of a corridor are improved.

Embodiments disclosed herein include a method of monitoring a condition of a chamber. In an embodiment, the method comprises processing a substrate in the chamber, providing substrate history and chamber data to a model of the chamber, where the model of the chamber is configured to predict a chamber cleanliness, comparing the predicted chamber cleanliness against a performance limit, and flagging the chamber for preventive maintenance (PM) when the predicted chamber cleanliness is above the performance limit.