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A communication system and method

A communication system and signal line technology, applied in the field of communication systems, can solve the problems that the main device cannot know the response, the frequency is out of synchronization, and the access work is abnormal, so as to avoid the access work abnormality, reduce the work frequency, and realize the frequency Synchronized effect

Active Publication Date: 2021-09-17
ZHENGZHOU YUNHAI INFORMATION TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, additional multiplexers will increase hardware costs. For this reason, the industry often uses complex programmable logic devices (Complex Programmable Logic Device, CPLD) or Field-Programmable Gate Array (Field-Programmable Gate Array, FPGA) and other programmable input and output devices (Input / Output, IO) can be used as multiplexers, but this kind of multiplexer formed by using existing devices can only transmit in one direction, specifically the transmission from the master device to the slave device, the master device The device cannot know the reaction of the slave device, and the frequency is not synchronized, which leads to abnormal access work

Method used

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Embodiment Construction

[0038] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiment of the application will be clearly and completely described below in conjunction with the accompanying drawings in the embodiment of the application. Obviously, the described embodiment is only It is a part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

[0039] The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of this application and the above drawings are used to distinguish similar objects, and not necessarily Used to describe a specific sequence or sequence. It is to be understood that the data so used are interchangeable under appropriate circumstances such that the ...

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Abstract

The present application discloses a communication system, which includes a master device, a slave device, and a programmable input and output device, wherein the master device and the slave device pass through the programmable input and output device, and the input and output device can be used as a multi The device converts a first serial clock signal line output by the master device into multiple second serial clock signal lines, and each second serial clock signal line controls a slave device respectively, so that the second serial clock signal line can be controlled by controlling the second The serial clock signal line avoids address conflicts. In addition, the first serial clock signal line is bidirectional, while the second serial clock signal line is unidirectional. When the master device communicates with the slave device, the programmable input and output devices can The first control instruction is sent to the master device to reduce the operating frequency of the master device, realize frequency synchronization between the master device and the slave device, and avoid abnormal access work. Correspondingly, the present application also discloses a communication method.

Description

technical field [0001] The present application relates to the communication field, and in particular to a communication system and method. Background technique [0002] In many scenarios, the master-slave device mode can be used to improve computing performance, improve computing reliability, or improve computing accuracy. The core idea of ​​the master-slave device mode is to decompose the original task into several semantically equivalent subtasks, and execute these tasks by dedicated worker threads. The processing results of the original task can be obtained by integrating the processing results of each subtask. [0003] Wherein, the master device (Master) distributes subtasks to the slave device (Slave), and the slave device returns the processing result of the subtask to the master device through an (Inter-Integrated Circuit, I2C) bus. I2C uses an addressable communication protocol, so a master device communicates with a slave device using a 7-bit or 10-bit address. Du...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F15/17G06F1/12
CPCG06F1/12G06F15/17
Inventor 陈麒旭
Owner ZHENGZHOU YUNHAI INFORMATION TECH CO LTD
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