3D memory device

Abstract

A 3D memory device is disclosed. The 3D memory device includes a gate stack structure including a plurality of gate conductors and a plurality of interlayer insulating layers alternately stacked; a plurality of channel posts penetrating the gate stack structure to form a transistor; and a plurality of conductive channels penetrating the gate stack structure to provide electrical connection with aperipheral circuit, wherein at least one conductive channel of the plurality of conductive channels is connected with a heat dissipation structure. As that conductive channel is connected to the heatdissipation structure to provide a heat dissipation path, the yield and reliability of the 3D memory device can be improved.

Description

technical field [0001] The present invention relates to the technical field of memory, and more particularly, to a 3D memory device. Background technique [0002] The improvement of the storage density of the memory device is closely related to the progress of the semiconductor manufacturing process. As the feature size of the semiconductor manufacturing process becomes smaller and smaller, the storage density of the memory device becomes higher and higher. In order to further increase storage density, memory devices with a three-dimensional structure (ie, 3D memory devices) have been developed. A 3D memory device includes a plurality of memory cells stacked in a vertical direction, which can double the integration level on a wafer per unit area and reduce the cost. [0003] Existing 3D memory devices are mainly used as non-volatile flash memory. The two main non-volatile flash memory technologies use NAND and NOR structures, respectively. Compared with NOR memory device...

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Problems solved by technology

[0004] In a 3D memory device with a NAND structure, a gate stack structure is used to form a memory cell array. In this 3D memory device, a large number of metal wirings are used to provide electrical connections between the memory cell array and external circuits. The increase in wiring density will affect Yield and Reliability of 3D Memory Devices

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