Pixel structure, array substrate and display device

Abstract

The invention relates to a pixel structure, an array substrate, and a display device. The pixel structure comprises a scan line, data lines, a pixel electrode, shading electrode lines, a first thin film transistor, shading electrode connection lines. The pixel electrode is arranged in a pixel region defined by the intersecting scan line and the data line. Each shading electrode line is connected to a common voltage and is arranged above the data line to shield the data line. The first thin film transistor is located between the scanning line and the pixel electrode, and is connected to the pixel electrode. The shading electrode connection lines extend in the scanning line direction, and are electrically connected with two adjacent shading electrode lines. The shading electrode connection lines are wound to form a mesh pattern. A semiconductor layer of the first thin film transistor is arranged opposite to a hollow region of the mesh pattern. The invention further provides a corresponding array substrate and a display device. According to the pixel structure, the array substrate, and the display device, the shading electrode connection line is designed to avoid the semiconductor layer of the thin film transistor, thereby improving display quality, and increasing the pixel opening rate.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to a pixel structure, an array substrate and a display device. Background technique [0002] At present, the method of improving LCD display quality with large viewing angle mainly applies 3T (TFT, thin film transistor) technology to release the voltage of sub pixel (sub pixel) to the common (COM) electrode, so as to achieve the display effect of 8 domains (domain). Such as figure 1 As shown, it is a schematic diagram of the equivalent circuit of the existing 3T pixel structure. Each sub-pixel can be divided into a main area (Main) and a sub-area (Sub), mainly including the thin film transistor T1 in the main area, and the storage capacitor C in the main area. A , sub-area TFT T2, sub-area storage capacitor C B , and the shared thin film transistor T3, one scanning line scan is set corresponding to each row of sub-pixels, and one data line Data is set corresponding to eac...

AI Technical Summary

Problems solved by technology

The potential of the light-shielding electrode connection line 30 is the same as that of the light-shielding electrode line connected to the common voltage. Generally speaking, the common voltage is about 6V. The role of the gate switch may affect the off-state current of the thin film transistor T3

When displaying, even if the gate (gate) of the thin film transistor T3 below is already in the off state, due to the effect of the common voltage on the light-shielding electrode connection line 30 on the upper surface, the thin film transistor T3 is not completely closed, which affects the display effect

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