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Power supply circuit and method capable of reducing power output error

A power supply circuit and power output technology, which is used in output power conversion devices, DC power input conversion to DC power output, electrical components and other directions, which can solve problems such as instability, high system operation, and fixed error of 3-5mV in hardware circuits. , to achieve the effect of improving accuracy, ensuring stability, and reducing errors

Inactive Publication Date: 2019-02-15
AMOLOGIC (SHANGHAI) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, during the power-on reset (RESET) period of the system, the chip output voltage is the design maximum or minimum value, so that the output voltage is in this relatively extreme state: the system cannot work normally or the range of variation is too large, which requires more DC-DC dynamic response. high or cause system instability
[0003] In order to overcome the above problems, two methods are currently used, one is to increase the stability of the system by adding a 10Kohm pull-up resistor, such as figure 1 As shown, R1 is an added pull-up resistor. During RESET, the stability of the state system is mainly determined by R1, but the added 10Kohm resistor will increase a certain error to the high voltage output; the other is through the PMU (powermanagement unit, power management unit) to improve the stability of the system, but it needs to increase the cost, and the hardware circuit will cause a fixed error of 3-5mV

Method used

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  • Power supply circuit and method capable of reducing power output error
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  • Power supply circuit and method capable of reducing power output error

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Embodiment Construction

[0024] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0025] It should be noted that, in the case of no conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other.

[0026] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments, but not as a limitation of the present invention.

[0027] Such as figure 1 As shown, the IO terminal of the PWM chip of the 3.3V PWM signal generally includes a 4...

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Abstract

The present invention discloses a power supply circuit and a method capable of reducing a power output error, pertaining to the field of power supply. According to the circuit and the method, by adopting a conversion circuit, the received power supply input voltage is converted into a target output voltage, and the conversion circuit is controlled to output the target output voltage under a high-impedance state via a PWM control unit. The method can improve the accuracy of the output voltage, reduce the error of the output voltage and ensure the system work stability.

Description

technical field [0001] The invention relates to the field of power supply, in particular to a power supply circuit and a method for reducing the output error of the power supply. Background technique [0002] The CPU (Central Processing Unit, Central Processing Unit) or GPU (Graphics Processing Unit, Graphics Processing Unit) power supply of smart TVs, set-top boxes, smart speakers and other electronic products is generally: 0.8V--1.2V (the current range is large), in the power supply The power supply voltage is dynamically adjusted according to the load of the CPU or GPU to achieve the purpose of stable system operation. In order to save costs, PWM (Pulse Width Modulation) is generally used to control the feedback terminal (FB) of the DC-DC power supply. However, during the power-on reset (RESET) period of the system, the chip output voltage is the design maximum or minimum value, so that the output voltage is in this relatively extreme state: the system cannot work normal...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H02M3/156
CPCH02M3/156H02M1/0022H02M1/0025
Inventor 许传停张坤
Owner AMOLOGIC (SHANGHAI) CO LTD