High-speed parallel sampling method
A high-speed, sampling data technology, applied in analog-to-digital converters, electrical components, code conversion, etc., can solve the problems of low ADC sampling speed, low sampling accuracy, low signal frequency, etc., to save global clock resources, high Sampling precision, high contrast effect
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[0030] The technical solutions of the present invention will be clearly and completely described below in conjunction with embodiments. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work shall fall within the protection scope of the present invention.
[0031] Refer to Figure 1-4 , The present invention provides a technical solution: figure 2 As shown, a high-speed parallel sampling method includes the following steps:
[0032] S1: The clock generation module generates the clock signal and transmits it to the frequency division unit and the frequency multiplication unit respectively to obtain the converted clock signal after frequency division and the data clock signal after frequency multiplication;
[0033] In the step S1, the clock generating module generates a clock si...
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