A Configurable Digital Decimation Filter

Abstract

The invention discloses a configurable digital decimation filter. The digital decimation filter includes a configurable cascaded comb integration filter, a compensation filter, a half-band filter, a configurable clock control module and a general signal interface. The configurable clock control module in the present invention configures the clocks used by the filters at all levels according to the decimation factor input through the general signal interface, thereby realizing variable sampling factor and output signal bandwidth, and solving the problem of sampling rate and output signal in the prior art The problem of fixed bandwidth meets the needs of multi-mode and multi-frequency. The present invention provides a low-frequency clock to the decimation unit and the comb unit in the configurable cascaded integral comb filter through the configurable clock control module, and solves the problem that the clock used by the unit in the CIC filter is the same frequency as the input data signal The problem of the high-frequency clock reduces the overall power consumption of the digital decimation filter to a certain extent.

Description

technical field [0001] The invention belongs to the technical field of electronic information and relates to a digital decimation filter, in particular to a configurable digital decimation filter applied to a Σ-Δ analog-to-digital converter. Background technique [0002] In the Σ-Δ analog-to-digital converter, the digital decimation filter extracts the high-speed digital signal modulated by the Σ-Δ modulator, extracts the useful low-frequency signal, and reduces the frequency of the digital signal to the value required by the analog-to-digital converter. The sampled analog signal corresponds to the Nyquist frequency output. When the Σ-Δ ADC is suitable for multi-mode and multi-frequency applications, in order to adapt to different signal bandwidths, it is often necessary to use multiple high-precision ADCs with different bandwidths to meet the needs of multi-mode and multi-frequency. This not only increases the design difficulty, but also multiplies the hardware overhead su...

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Problems solved by technology

[0010] The purpose of the present invention is to provide a kind of configurable digital decimation filter that is applied to Σ-Δ analog-to-digital converter, and this digital decimation filter has avoided CIC filter in the prior art and can not realize variable sampling rate and output signal The bandwidth cannot meet the needs of multi-mode and multi-frequency, and at the same time achieve lower power consumption by controlling the clock

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