Method for eliminating asymmetric error through transmitting IEC61588 by SDHSDH (Synchronous Digital Hierarchy)

Abstract

The invention provides a method for eliminating asymmetric error through transmitting IEC61588 by SDH (Synchronous Digital Hierarchy). The method is characterized by comprising the following steps that: step S1: the primary PTP (IEC61588) main clock transmits an Ethernet code stream comprising a PTP protocol packet through the Ethernet; step S2, a protocol conversion device converts the Ethernet code stream in step S1 into an E1 code stream; step S3, the SDH network transmits the E1 code stream in step S2 step by step; step S4, the protocol conversion device converts the E1 code stream in stepS3 into an Ethernet code stream; step S5: the slave clock acquires the PTP protocol packet from the Ethernet code stream in step S4, and extracts a timestamp to adjust the time of the slave clock; and step S6, the asymmetric error compensation is performed on the time of the slave clock by a asymmetric error compensation algorithm. The method for eliminating asymmetric error through transmittingthe IEC61588 by the SDH disclosed in the invention eliminates the asymmetric error uses the SDH transmission network to transmit the IEC61588 protocol, thereby effectively saving costs and improving the accuracy.

Description

technical field [0001] The invention relates to the technical field of clock synchronization, in particular to a method for eliminating asymmetric errors in SDH transmission IEC61588. Background technique [0002] IEC61588, also known as PTP, is more and more widely used in industrial control, electric power, mobile communication and other fields. It can provide time synchronization accuracy of sub-microsecond level or even nanosecond level. In the IEC61588 time synchronization protocol, the basis of the time synchronization protocol is the symmetry of the uplink and downlink transmission delays. If the uplink and downlink transmission delays are asymmetric, that is, t_ms is not equal to t_sm, the time offset calculated using the IEC61588 time synchronization protocol contains asymmetric error values The time deviation cannot be corrected correctly, the quality of time synchronization is reduced, and even the time basically cannot be synchronized. In real life, communicat...

AI Technical Summary

Problems solved by technology

The path delay in the transmission network includes the link delay between the master clock and the switch, the internal delay of the switch, the link delay between the switch and the slave clock, and the switching of the transmission link, especially the channel switching of the transmission link It has a great impact on the link. The uncertainty of this link change will inevitably lead to the asymmetry of the link between the master and slave clocks. The asymmetry of the propagation delay has become a major challenge to solve the clock synchronization problem.

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