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One-bus communication signal enhancement circuit

A communication signal, single bus technology, applied in the field of communication, can solve the problem of insufficient signal transmission driving ability, and achieve the effects of strong driving ability, improved stability, and increased transmission capacity

Active Publication Date: 2019-04-05
SUZHOU LUZHIYAO TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The purpose of the present invention is to provide a single-bus communication signal enhancement circuit, which improves the driving ability and accuracy of signal transmission by setting drive units at the master end and slave end respectively, and solves the lack of signal transmission driving ability in the single-bus communication process technical issues

Method used

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  • One-bus communication signal enhancement circuit

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Embodiment Construction

[0043] The present invention will be further described in detail below in conjunction with the accompanying drawings, so that those skilled in the art can implement it with reference to the explanatory text.

[0044] like figure 1 As shown, the present invention provides a single-bus communication signal enhancement circuit, including a host transceiver circuit and a slave transceiver circuit, and the host transceiver circuit includes a first pull-up resistor Rup1, a first comparison unit, a first drive unit, and a first reference Signal generating unit. The slave transceiver circuit includes a second pull-up resistor Rup2, a second comparing unit, a second driving unit and a second reference signal generating unit.

[0045] The first pull-up resistor Rup1 is connected to the host interface terminal SBUS1, and under normal conditions, the voltage of the host interface terminal SBUS1 is kept at a high level through the first pull-up resistor Rup1.

[0046] The first compariso...

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Abstract

The invention discloses a one-bus communication signal enhancement circuit. The reverse-phase input end of a first comparison unit is connected with a host interface end; the control end of a first driving unit is connected with the output end of the first comparison unit; the input end of a first reference signal generating unit is connected with the output end of the first comparison unit; the reverse-phase input end of a second comparison unit is connected with a slave interface end; the in-phase input end of the second comparison unit is connected with the output end of the first referencesignal generating unit; the input end of the first driving unit is connected with the slave interface end; the control end of a second driving unit is connected with the output end of the second comparison unit; the input end of the second driving unit is connected with the host interface end; the input end of a second reference signal generating unit is connected with the output end of the second comparison unit; and the output end of the second reference signal generating unit is connected with the in-phase input end of the first comparison unit. The technical problem of insufficient signaltransmission driving ability in the process of one bus communication can be solved.

Description

technical field [0001] The invention relates to the technical field of communication, in particular to a single-bus communication signal enhancement circuit. Background technique [0002] Currently, the commonly used serial buses for data transmission between microcomputers and peripherals mainly include I2C bus, SPI bus and SCI bus. Among them, the I2C bus communicates in a synchronous serial 2-wire mode (a clock line, a data line), and the SPI bus communicates in a synchronous serial 3-wire mode (a clock line, a data input line, and a data output line). The SCI bus communicates in an asynchronous manner (one data input line, one data output line). These buses require at least two or more signal lines. In recent years, a unique single bus (1-Wire Bus) technology has been introduced. This technology is different from the above-mentioned bus. It uses a single signal line, which can transmit both clock and data, and the data transmission is bidirectional. Therefore, this si...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04B1/40H04B1/401H04L12/40
CPCH04B1/40H04B1/401H04L12/40
Inventor 周荣张满新吴军
Owner SUZHOU LUZHIYAO TECH
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