FPGA design circuit diagram generation method and device, computer equipment and storage medium

A technology for circuit design and user design, applied in the field of FPGA development, can solve problems such as complex wiring structures, achieve clear structure, reduce complexity, and reduce memory usage

Active Publication Date: 2019-05-24
GOWIN SEMICON CORP LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Embodiments of the present invention provide a FPGA design circuit diagram generation method, device, computer equipment, and storage medium to solve the problem of complex wiring structures in design circuits that exist in current FPGA circuit design

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  • FPGA design circuit diagram generation method and device, computer equipment and storage medium
  • FPGA design circuit diagram generation method and device, computer equipment and storage medium
  • FPGA design circuit diagram generation method and device, computer equipment and storage medium

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Embodiment Construction

[0035] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, but not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0036] The FPGA design circuit diagram generation method provided by the embodiment of the present invention, the FPGA design circuit diagram generation method is applied in the FPGA editing and development system, and is used to develop and design an FPGA design circuit diagram with a simple wiring structure, so as to reduce the software memory occupation and improve the FPGA design circuit diagram. development efficiency.

[0037] In one embodiment, ...

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Abstract

The invention discloses an FPGA design circuit diagram generation method and device, computer equipment and a storage medium. The method comprises the steps of acquiring a user design netlist and traversing a netlist input pin, an original device and a netlist output pin according to connecting lines in the user design netlist to acquire a target two-dimensional netlist; based on the device type,the device input pin and the device output pin corresponding to each original device, obtaining device description data; determining a standard display area based on the device description data; constructing an original device distribution map based on the target two-dimensional netlist and the standard display area; obtaining row spacing and column spacing according to the number of the connecting lines corresponding to each original device; updating the original device distribution map based on the row spacing, the column spacing and the device description data to obtain a target device distribution map; and generating a corresponding connecting line at a corresponding position on the target device distribution diagram, and obtaining an FPGA design circuit diagram. According to the method, a design circuit diagram with a clear connection structure and low complexity can be generated.

Description

technical field [0001] The present invention relates to the technical field of FPGA development, in particular to a method, a device, a computer device and a storage medium for generating an FPGA design circuit diagram. Background technique [0002] During the FPGA development process, the FPGA programming development tool can automatically draw and display the corresponding design circuit according to the netlist designed by the user, which is convenient for the user to understand the designed netlist structure, facilitate design debugging, improve design efficiency, and shorten the design time. cycle. [0003] When the traditional FPGA programming development tool displays the design circuit, because the design circuit involves many devices and the connection lines (net) used to realize the interconnection between the devices, the connection structure of the connection lines is complicated, and multiple connection lines are connected to each other. There will be interleav...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
Inventor 刘奎张青
Owner GOWIN SEMICON CORP LTD
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