A machine learning reasoning coprocessor

Abstract

The embodiment of the invention provides a machine learning reasoning coprocessor. The machine learning reasoning coprocessor comprises a reasoning unit and a control unit. The reasoning unit is usedfor reading and calculating a task instruction, data and parameters so as to realize reasoning operation corresponding to the task instruction; and the control unit comprises a main control unit and aplurality of channel control units. Wherein the main control unit is used for realizing global control on the machine learning reasoning coprocessor; and each channel control unit in the plurality ofchannel control units is used for respectively controlling a channel corresponding to the reasoning unit in the reasoning unit to realize response to a single task or a user according to the task instruction. According to the embodiment of the invention, multiple users and multiple tasks can be supported, and flexible customized design can be realized.

Description

Technical field [0001] The embodiment of the present invention relates to the technical field of digital chips, in particular to a machine learning inference coprocessor. Background technique [0002] With the development of machine learning technology, the applications of Convolutional Neural Networks (CNN) and Deep Neural Networks (DNN) have become more and more widely used, and corresponding research work is constantly being carried out. [0003] In the prior art, there are hardware acceleration solutions for accelerating CNN and DNN operations. However, the existing hardware acceleration schemes have some shortcomings. For example, most of the existing hardware acceleration solutions are based on embedded application scenarios, cannot support multi-user and multi-task, and cannot achieve flexible customized design. For another example, the existing hardware acceleration solutions can only support one of CNN or DNN, and cannot support both neural networks at the same time. Fo...

AI Technical Summary

Problems solved by technology

However, existing hardware acceleration solutions have some shortcomings

For example, most of the existing hardware acceleration solutions are based on embedded application scenarios, which cannot support multi-user and multi-tasking, and cannot realize flexible customized design

As another example, existing hardware acceleration solutions can only support either CNN or DNN, and cannot support both neural networks at the same time.

As another example, existing hardware acceleration solutions usually require a large number of accesses to external memory, resulting in performance degradation

In addition, the existing hardware acceleration solutions have poor software flexibility and hardware scalability

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