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Radiation resistant transistor based on patterned soi substrate and manufacturing method thereof

A manufacturing method and patterning technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as failure and leakage, and achieve the effect of eliminating leakage channels

Active Publication Date: 2021-01-19
SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] In view of the shortcomings of the prior art described above, the purpose of the present invention is to provide a radiation-resistant transistor based on a patterned SOI substrate and its manufacturing method, which is used to solve the problem that the transistor has a certain range of total dose effect in the prior art. Leakage or even failure caused by response

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  • Radiation resistant transistor based on patterned soi substrate and manufacturing method thereof
  • Radiation resistant transistor based on patterned soi substrate and manufacturing method thereof
  • Radiation resistant transistor based on patterned soi substrate and manufacturing method thereof

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Embodiment 1

[0054] Such as figure 1 As shown, removing the insulating layer (BOX layer) below the channel of the SOI transistor can effectively prevent the total dose effect. A transistor structure based on a patterned SOI substrate is shown in figure 1 As shown, this solution removes the insulating layer below the transistor channel to form a groove 101, which can effectively reduce the total dose effect. However, the insulating layer (BOX layer) in the structure still has an overlapping contact portion 102 with the conductive channel, and when the total When the dose effect occurs, it will cause leakage in the direction of the cutting head as shown in the dotted line.

[0055] Based on the above problems, such as Figure 2 to Figure 28As shown, the present embodiment provides a method for fabricating an anti-irradiation transistor based on a patterned SOI substrate, the fabricating method comprising steps:

[0056] Such as Figure 2 ~ Figure 4 As shown, among them, figure 2 Shown...

Embodiment 2

[0079] This embodiment provides a radiation-resistant transistor based on a patterned SOI substrate and its manufacturing method. Its basic steps and structure are as in Embodiment 1, wherein the difference from Embodiment 1 is that the transistor is a PMOS transistor , the top semiconductor layer 203 is lightly doped with n-type, the heavily doped region 210 of the first conductivity type is heavily doped with n-type, and the source region 216 and drain region 217 are heavily doped with p-type.

[0080] As mentioned above, the fabrication method of the radiation-resistant transistor based on the patterned SOI substrate of the present invention has the following beneficial effects:

[0081] In the present invention, ion implantation is performed on both ends of the second semiconductor layer 205 of the cross-shaped semiconductor island to form a heavily doped region 210 of the first conductivity type, and the width of the heavily doped region 210 of the first conductivity type ...

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Abstract

The invention provides an anti-irradiation transistor based on a patterned SOI substrate and a manufacturing method thereof. The structure comprises a patterned SOI substrate, a first conductive-typeheavily doped region, a gate structure, a source region and a drain region in a second conductive type, a passivation layer and source and drain electrodes, wherein the insulating layer of the patterned SOI substrate is provided with a groove, the top semiconductor layer presents a cross-shaped semiconductor island which completely covers the groove, and the cross-shaped semiconductor island comprises a first semiconductor layer and a second semiconductor layer; the first conductive-type heavily doped region is formed at two ends of the second semiconductor layer, and the width of the first conductive-type heavily doped region in a second direction is larger than that of the overlapping area between the second semiconductor layer and the insulating layer. Through arranging the first conductive-type heavily doped region at two ends of the second semiconductor layer of the cross-shaped semiconductor island, a leakage channel caused by the total dose effect can be effectively eliminated,and the device thus has zero response to the total dose effect.

Description

technical field [0001] The invention belongs to the field of semiconductor design and manufacture, in particular to a radiation-resistant transistor based on a patterned SOI substrate and a manufacturing method thereof. Background technique [0002] Transistors based on SOI substrates have good anti-single event effects, but because in the SOI structure, the insulating layer (BOX layer) tends to accumulate more positive charges when high-energy particles are incident, the positive charges cause in the SOI top layer silicon The parasitic conductive channel introduces leakage current, which makes the electrical performance of the device drift. This effect is called the total dose effect, and the total dose effect is the main reason for the failure of SOI transistors in the irradiation environment. Contents of the invention [0003] In view of the shortcomings of the prior art described above, the purpose of the present invention is to provide a radiation-resistant transisto...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/06H01L29/08H01L21/336H01L29/78
Inventor 刘强俞文杰任青华陈治西刘晨鹤赵兰天陈玲丽王曦
Owner SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI