Semiconductor device and method for manufacturing same
A manufacturing method and semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electric solid-state devices, etc., can solve problems such as unit current reduction
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no. 1 Embodiment approach
[0026] (First Embodiment: Semiconductor Device)
[0027] figure 1 It is a schematic perspective view of the memory cell array 1 of the semiconductor device of the first embodiment. figure 1 Herein, two directions parallel to the main surface 10a of the substrate 10, that is, two directions perpendicular to each other are referred to as the X direction (first direction) and the Y direction (second direction), and the direction relative to the X direction The direction perpendicular to the two directions of the Y direction and the Y direction is referred to as the Z direction (stacking direction of the stacked body 100).
[0028]
[0029] Such as figure 1 As shown, the semiconductor device of the first embodiment includes a memory cell array 1 . Memory cell array 1 is provided, for example, on main surface 10 a of substrate 10 . The substrate 10 is, for example, a semiconductor substrate. The semiconductor substrate contains silicon, for example. The conductivity type of...
no. 2 Embodiment approach
[0092] (Second Embodiment: Semiconductor Device)
[0093] Figure 9 It is a schematic cross-sectional view of the semiconductor device of the second embodiment.
[0094] Such as Figure 9 As shown, the semiconductor device of the second embodiment is provided with three or more stacked parts (for example, a first stacked part 100a, a second stacked part 100b, a third stacked part 100c, and a fourth stacked part 100d). The stacked parts (for example, the first to fourth stacked parts 100 a to 100 d ) are stacked on the substrate 10 in the Z direction. High dielectric layers (first to third high dielectric layers 75 a to 75 c ) are provided as connection portions 45 (for example, first to third connection portions 45 a to 45 c ) between the stacked portions.
[0095] Also in the second embodiment, high dielectric layers (first to third high dielectric layers 75a to 75c) are used as connection portions (for example, first to third connection portions 45a to 45c). Therefore, e...
no. 3 Embodiment approach
[0099] (Third Embodiment: Semiconductor Device)
[0100] Figure 10 It is a schematic cross-sectional view of the semiconductor device of the third embodiment.
[0101] Such as Figure 10 As shown, the semiconductor device of the third embodiment differs from the semiconductor device of the first embodiment in that the connecting portion 46 includes insulating layers 76 and 77 , and the high dielectric layer 75 has a protruding portion 75p. The insulating layer 76 is provided between the first stacked part 100a and the second stacked part 100b. The insulating layer 77 is provided between the insulating layer 76 and the second stack portion 100b. The high dielectric layer 75 is disposed between the insulating layer 76 and the insulating layer 77 .
[0102] The protruding portion 75p has a substantially circular shape. The protruding portion 75p surrounds a part of the middle portion CLm. For example, a part of the protruding portion 75 p is in contact with the semiconduct...
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