Composite DCDC circuit

Abstract

The present invention relates to the technical field of circuits and particularly relates to a composite DCDC circuit. The circuit comprises a switching device group connected between an input end anda ground end of a working circuit, a driving control unit whose input end is connected to an output end of the working circuit, a compensation unit whose input end is connected to an output end of the driving control unit, a loop compensation unit whose input end is connected to an output end of the compensation unit, and an adjusting unit whose input end is connected to an output end of the compensation unit, wherein the driving control unit is used for generating a PWM driving signal according to a voltage signal under the effects of a voltage signal and a switching control signal outputtedby the working circuit, the compensation unit is used for adjusting and compensating a range of a PWM driving signal, and the adjusting unit is used for adjusting a gain of the PWM driving signal. The technical scheme of the invention has the advantages that a dual-loop architecture is adopted, a compensation loop is added without destroying the stability of an original loop, and the accuracy ofthe output voltage is improved.

Description

technical field [0001] The invention relates to the technical field of circuits, in particular to a composite DCDC (Direct Current DC power converted to DC power) circuit. Background technique [0002] With the wide application of portable electronic products in the fields of communication, computer and consumer electronic products, the demand for power management integrated chips continues to rise. The DCDC switching power supply is widely used due to its advantages of wide input voltage range, large output current, small quiescent current, and wide output load range. DCDC switching power supply has a variety of control modes. According to the sampling signal, it can generally be divided into voltage mode and current mode. The voltage mode performs negative feedback by sampling the output voltage; the current mode performs negative feedback by sampling the input current and output voltage. [0003] In the prior art, COT (constant on-time mode) has a fast response speed, b...

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Problems solved by technology

[0003] In the prior art, COT (constant on-time mode) has a fast response speed, but it needs to generate a voltage ripple from the ESR resistor in phase with the inductor current to stabilize the loop. For ceramic capacitors with extremely small ESR Occasionally, stability is more difficult; if a single loop is used, the gain of the comparator is limited; because the comparator requires high speed, the size of the input tube cannot be too large to reduce the parasitic capacitance, so there is a large error itself; the first phase comparison point is The high point of the feedforward capacitor (the boost architecture is the high point, and the buck architecture is the low point), so the comparison point of the comparator itself has an error, so when the load is small and the ripple is small, the output voltage value changes not big

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