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HEVC fine-grained parallel coding method based on multi-core platform

A coding method and fine-grained technology, applied in the field of video coding, can solve problems such as low coding efficiency, and achieve the effect of reducing idle time, avoiding load imbalance problems, and reducing performance loss

Inactive Publication Date: 2019-11-12
NANJING UNIV OF POSTS & TELECOMM
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Problems solved by technology

[0004] Aiming at the problem of low encoding efficiency in WPP and joint WPP parallel schemes in the HEVC standard, the present invention proposes a HEVC fine-grained parallel encoding method based on a multi-core platform

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  • HEVC fine-grained parallel coding method based on multi-core platform
  • HEVC fine-grained parallel coding method based on multi-core platform
  • HEVC fine-grained parallel coding method based on multi-core platform

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Embodiment

[0052] Use the degree of parallelism (PL, Parallelism) to evaluate the improvement of the coding speed by the parallel scheme and the thread resource strategy. The formula is as follows:

[0053]

[0054] Among them, EncTime i,F refers to the time used when using the parallel encoding method F and using i cores for encoding. A frame of image can be divided horizontally and vertically into W (row)×H (column) CTU units. Since the number of processor core threads is fixed, the test experiment of video sequences with different resolutions under the same parallel algorithm scheme will appear There are two situations: lack of nuclear resources and waste of nuclear resources. Assuming that the average coding time of each CTU is one time unit, according to figure 1 The CTU node model can be concluded that there will be n time units of parallel processing when the core is sufficient:

[0055] n=2×(H-1)+W (2)

[0056] If (W×H) is 4 and 5 respectively, then 12 CTU time unit losses...

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Abstract

The invention belongs to the technical field of HEVC video coding, and simply summarizes an HEVC fine-grained parallel coding method based on a multi-core platform. The method aims at solving the problems of high calculation complexity and huge data volume in the coding technology in the HEVC standard; the high-performance parallel capability of a TILE-Gx36 multi-core processor is utilized, frame-level coding work in a video sequence is divided into CTU-level tasks, a parallel processing scheme is designed in combination with a thread pool technology, and the coding speed of the video sequenceis increased. According to the invention, the intra-frame and inter-frame dependence relationship of CTUs in HEVC is studied; the problem of frame-by-frame coding of a WPP scheme in HEVC is solved byimproving the dependency relationship, the dependency relationship is represented by introducing directed graph change, and an adjacent matrix and an in-degree matrix are specifically used for designing a CTU granularity parallel scheme, so that the problem of load imbalance between CTUs is solved, and core thread resources are fully utilized. Finally, entropy coding improvement is carried out onthe parallel scheme, so that the coding speed is increased and the coding efficiency is improved.

Description

technical field [0001] The invention belongs to the technical field of video coding, and in particular relates to a parallel coding method of CTU granularity in the HEVC standard based on a multi-core platform. Background technique [0002] HEVC (High Efficiency Video Coding) is a new generation of video coding jointly formulated by the Video Coding Experts Group (VCEG) of the International Telecommunication Union Standardization Organization and the Moving Picture Experts Group (MPEG) of the International Organization for Standardization. This standard doubles the compression efficiency of the previous standard H.264 / AVC, and is more suitable for encoding, transmission and application of ultra-high-definition video. HEVC supports the development of parallel processor architecture and introduces a variety of new parallel encoding processing technologies. Wavefront Parallel Processing (WPP: Wavefront Parallel Processing) has received widespread attention as a parallel proces...

Claims

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Application Information

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IPC IPC(8): H04N19/13H04N19/184H04N19/436
CPCH04N19/13H04N19/184H04N19/436
Inventor 胡栋尹传伟李毅
Owner NANJING UNIV OF POSTS & TELECOMM
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