Unlock instant, AI-driven research and patent intelligence for your innovation.

Column cycle adc unit and conversion method used in maps

A column cycle and amplifying unit technology, applied in column cycle ADC unit and conversion field, can solve the problems of reduced conversion speed, disadvantageous low power consumption and area saving, increase conversion cycle, etc., to improve conversion rate, reduce hardware consumption, The effect of reducing power consumption

Active Publication Date: 2022-04-26
INST OF MODERN PHYSICS CHINESE ACADEMY OF SCI
View PDF0 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the traditional cycle algorithm ADC, the residual amplification unit and the sample and hold unit all need operational amplifiers, which is not conducive to low power consumption and area saving
And the traditional structure requires a separate cycle for sampling the input signal, which adds a conversion cycle and reduces the conversion speed

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Column cycle adc unit and conversion method used in maps
  • Column cycle adc unit and conversion method used in maps
  • Column cycle adc unit and conversion method used in maps

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0054] Such as figure 1 As shown, the column cycle ADC unit integrated in the MAPS chip provided by this embodiment includes a sub-level ADC, a sub-level DAC, a digital correction unit, a margin amplification unit, and a sample-and-hold unit;

[0055] The sub-stage ADC is used to convert the input analog signal V i Carry out coarse quantization and output digital a i b i ;

[0056] The sub-level DAC is used to convert the digital a i b i Converted to analog V dac ;

[0057] The margin amplification unit is used to input analog V i and V dac Subtract and amplify to generate a margin signal;

[0058] The sample-and-hold unit is used to hold the margin signal and circulate it into the stage V i port;

[0059] The digital correction unit is used to convert the n sets of a generated by the n cycle sub-level ADC i b i (i=1, 2, 3...,n) digital codes are stored and operated to obtain (n+1) bit digital code d[n:0], and output in the last cycle.

[0060] Preferably, the re...

Embodiment 2

[0072] The timing of the ADC work and the clock signal of the control switch provided by this example are shown in Figure 6 , the conversion period is Figure 6 One cycle of the CLK signal, one cycle of the CLK signal includes the high level of the Φ1 and Φ2 signals, the step of the high level control of the Φ1 and Φ2 signals is a conversion cycle, and the high level stage of the periodic signal CLK in the figure is The first half cycle corresponds to the high level stage of the Φ1 signal, and the low level is the second half cycle, which corresponds to the high level stage of the Φ2 signal. One cycle of the CLK signal corresponds to the high-level phases of Φ1 and Φ2, that is, a conversion cycle, which completes the operation of the sub-level ADC output digital and residual signals. The Φ3 signal controls the sampling of external signals, and the high level phase is the sampling period.

[0073] The method for analog-to-digital conversion using the column cycle ADC unit in...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The present invention is a column cycle ADC unit integrated in MAPS chip and conversion method, the ADC unit includes: sub-level ADC, used for input analog signal V i Carry out coarse quantization and output digital a i b i ; Sub-level DAC, used to convert the digital a i b i Converted to analog V dac ; The margin amplifying unit is used to input the analog quantity V i and V dac Subtract and amplify to generate the margin signal; the sample and hold unit is used to hold the margin signal and circulate it into the V of this stage i Port; digital correction unit, used to convert n groups of digital code a generated by n period sub-level ADC i b i , i=1,2,3...,n to perform operations to obtain (n+1)bit digital codes and output them in the last cycle.

Description

technical field [0001] The invention relates to a column cycle ADC unit and a conversion method used in MAPS (single-chip active pixel detector), and relates to the field of semiconductor integrated circuit design. Background technique [0002] In the fields of detectors such as high-energy physics experiments, space detection, and intelligent digital diagnosis and treatment, if you want to perform energy spectrum detection and element identification of different types of high-energy particles that have been unknown so far, you need a pixel detector that can simultaneously detect the track information and energy of the particles. Amplitude information. At present, the international mainstream pixel detectors for energy measurement—monolithic active pixel sensor (MAPS) chips, all use the ADC (analog-to-digital conversion) outside the MAPS chip to detect The analog output of the obtained particle energy is converted to digital and the data is processed in the subsequent reado...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H03M1/12
CPCH03M1/1285
Inventor 赵承心杨海波王秀华李荣华李占奎苏弘
Owner INST OF MODERN PHYSICS CHINESE ACADEMY OF SCI