Data decompression device and method based on FPGA
A data decompression and data technology, applied in the direction of transmission modification based on link quality, digital transmission system, electrical components, etc., can solve the problem of inability to realize dynamic memory allocation storage matching code table, complex matching code table storage format, matching decoding cycle Matching time and other issues, to improve the accuracy of parsing, avoid excessive judgment conditions, and improve the speed of matching decoding
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[0056] The present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments.
[0057] Such as figure 1 Shown, a kind of data decompression device based on FPGA, comprises the physical layer interface module 1, TCP / IP module 2, subpackage group module 3, decompression module 4 and output module 5 connected successively, subpacket group module module 3 also Directly connected to the output module 5, the output module 5 is connected to the computer, wherein the output module 5 includes a DMA unit and a PCIe interface unit, specifically, the physical layer interface module 1 is connected to the network to receive network data, and perform MAC on the network data After layer analysis, it is transmitted to TCP / IP module 2;
[0058] TCP / IP module 2 performs TCP analysis on network data to obtain application data;
[0059] The subpackage module 3 then divides and combines the application data to obtain ZIP packets and uncompr...
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