Fan-out packaging method and fan-out packaging structure

Abstract

The invention discloses a fan-out packaging method and a fan-out packaging structure. The fan-out packaging method comprises the steps: forming rewiring layers at two ends of a first surface of a carrier plate; forming conductive metal columns on the upper surfaces of the rewiring layers; attaching the back surface of a chip to a blank area of the first surface of the carrier plate; forming a plastic package layer on the first surface of the carrier plate, and forming a conductive interconnection layer on the front surface of the chip and the upper surface of the plastic package layer, whereinthe conductive interconnection layer are electrically connecting the with the chip and the conductive metal columns respectively; and removing the carrier plate and a temporary bonding layer formed on the first surface of the carrier plate, and penetrating through an insulating dielectric layer connected with the rewiring layer to form welding spots electrically connected with the rewiring layer.The method provided by the invention realizes the double-sided fan-out package of the chip; since the conductive metal columns run through the plastic packaging layer, the two sides of the chip layercan be electrically connected through the conductive metal columns; and the production difficulty of the packaging structure is reduced, the reliability of each process is improved, and the size of the packaging structure is reduced.

Description

technical field [0001] The invention relates to the technical field of chip packaging, in particular to a fan-out packaging method and packaging structure. Background technique [0002] With the rapid development of integrated circuit technology, integrated circuit packaging has also been continuously improved. The feature size of the chip is gradually miniaturized to meet the requirements of Moore's Law. Although the feature size of the chip is reduced, the number of electronic components in the chip is increasing (including resistors, capacitors, diodes, transistors, etc.). In order to realize the application of chip functions in product terminals, packaging technology with compact package size and more output terminal I / Os is required in the field of packaging. At present, advanced packaging methods include: wafer-level chip-scale packaging, fan-out packaging flip-chip (Flip Chip) and stacked packaging, etc. [0003] Among them, the fan-out package is an embedded packag...

AI Technical Summary

Problems solved by technology

[0004] In view of this, the present invention provides a fan-out packaging method and structure, so as to solve the technical problems of large volume and complicated manufacturing process of the prior art packaging structure

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