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Multi-chip integrated packaging method and structure

A multi-chip integration and packaging structure technology, applied in electrical components, electrical solid devices, circuits, etc., can solve the problems of large interconnection distance between multi-chips in packaging volume, etc., and achieve low cost, small packaging volume, and high process precision. Effect

Active Publication Date: 2019-12-31
SHANGHAI XIANFANG SEMICON CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Although multi-chip modules have many advantages, the existing multi-chip packaging structure is still based on substrate, wire bonding, flip-chip FC (flip-chip), TSV through-hole and other technologies. Even the distance is relatively large

Method used

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  • Multi-chip integrated packaging method and structure
  • Multi-chip integrated packaging method and structure
  • Multi-chip integrated packaging method and structure

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Embodiment Construction

[0028] In the following description, the present invention is described with reference to various embodiments. However, those skilled in the art will recognize that the various embodiments can be implemented without one or more specific details or with other alternative and / or additional methods, materials or components. In other cases, well-known structures, materials, or operations are not shown or described in detail so as not to obscure aspects of various embodiments of the present invention. Similarly, for the purpose of explanation, specific quantities, materials, and configurations are set forth in order to provide a thorough understanding of the embodiments of the present invention. However, the present invention can be implemented without specific details. In addition, it should be understood that the various embodiments shown in the drawings are illustrative representations and are not necessarily drawn to scale.

[0029] In this specification, reference to "one embod...

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Abstract

The invention discloses a multi-chip integrated packaging structure. The packaging structure comprises at least two chips, a re-wiring structure and a plastic package layer, wherein a front surface ofeach chip is provided with one or more external bonding pads and solder balls; the rewiring structure includes one or more conductive metal layers and an insulating medium distributed between the conductive metal layers; a first surface of the rewiring structure is provided with one or more bonding pads, a back surface of each chip is attached to a first surface of the rewiring structure, and theexternal bonding pads of the chips are electrically connected with the one or more bonding pads on the first surface of the rewiring structure through leads; and the plastic package layer covers thefirst surface of the rewiring structure, the chips and the leads are wrapped in the plastic package layer, and the solder balls on the front surface of the chip are not wrapped by the plastic packagelayer.

Description

Technical field [0001] The invention relates to the technical field of chip packaging, in particular to a packaging method and structure for multi-chip integration. Background technique [0002] With the development of further miniaturization of electronic products, the solution of interconnecting multi-chips through PCB substrates has been gradually replaced by multi-chip modules (MCM) in many cases. A multi-chip module (MCM) refers to a module in which multiple integrated circuit chips are electrically connected to a common circuit substrate and used to realize interconnection between the chips. It is a typical highly integrated module. The chips in these components are usually unsealedly assembled on a multi-layer interconnected substrate by wire bonding, tape carrier bonding, or flip-chip bonding, and then are plasticized to form a package structure. Compared with mounting the chip directly on the PCB, MCM has certain advantages. For example: (1) The transmission path betwe...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/49H01L23/538H01L25/00H01L25/16H01L25/18H01L21/48H01L21/768
CPCH01L21/4889H01L21/76895H01L23/49H01L23/5386H01L25/00H01L25/16H01L25/18H01L25/50H01L2224/73207H01L2924/181H01L2924/00012
Inventor 任玉龙曹立强
Owner SHANGHAI XIANFANG SEMICON CO LTD
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