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Method for forming semiconductor structure

A technology of semiconductors and dummy gates, which is applied in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., and can solve problems such as unsatisfactory

Inactive Publication Date: 2020-01-07
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

While these approaches are generally adequate, they still cannot satisfy all aspects of

Method used

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  • Method for forming semiconductor structure
  • Method for forming semiconductor structure
  • Method for forming semiconductor structure

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Embodiment Construction

[0037] Different embodiments or examples provided below may implement different configurations of the present invention. The following examples of specific components and arrangements are used to simplify the content of the present invention but not to limit the present invention. For example, a description of forming a first component on a second component includes an embodiment in which the two are in direct contact, or an embodiment in which the two are interposed by other additional components rather than in direct contact. On the other hand, multiple examples of the present invention may repeatedly use the same reference numerals for brevity, but elements with the same reference numerals in various embodiments and / or arrangements do not necessarily have the same corresponding relationship.

[0038] In addition, a structure of an embodiment of the present invention may be formed on, connected to, and / or coupled into another structure, the structure may directly contact the...

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Abstract

The present application provides a method for forming a semiconductor structure. The method includes providing dummy gate structures disposed over a device region and over an isolation region adjacentthe active region, first gate spacers disposed along sidewalls of the dummy gate structures in the active region, and second gate spacers disposed along sidewalls of the dummy gate structures in theisolation region, removing top portions of the second, but not the first gate spacers, forming a first dielectric layer over the first gate spacers and remaining portions of the second gate spacers, replacing the dummy gate structures with metal gate structures after the forming of the first dielectric layer, removing the first gate spacers after the replacing of the dummy gate structures, and forming a second dielectric layer over top surfaces of the metal gate structures and of the first dielectric layer.

Description

technical field [0001] Embodiments of the present invention relate to a spacer for a high dielectric constant gate dielectric layer and a metal gate structure and a method for forming the same. Background technique [0002] The semiconductor integrated circuit industry has experienced exponential growth. Technological advances in integrated circuit materials and design have resulted in each generation of integrated circuits having smaller and more complex circuits than the previous generation. In the evolution of integrated circuits, functional density (eg, the number of interconnect devices per chip area) generally increases as geometric dimensions (eg, the smallest component or circuit that a process can produce) shrink. Dimension-reduced processes facilitate increased throughput and lower associated costs. Dimensional shrinkage also increases the complexity of processing and forming integrated circuits. [0003] For example, many approaches have been developed to intro...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336H01L29/78H01L29/423
CPCH01L29/42356H01L29/42364H01L29/66803H01L29/7855
Inventor 陈彦廷柳依秀李威养杨丰诚陈燕铭
Owner TAIWAN SEMICON MFG CO LTD