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Load matching circuit of double-pulse solid-state modulator and control method thereof

A load matching circuit, double pulse technology, applied in the direction of pulse amplitude modulation, pulse processing, pulse technology, etc., can solve the problem that the pulse waveform cannot be leveled at the same time, and achieve the effect of improving stability

Pending Publication Date: 2020-02-11
SICHUAN INJET ELECTRIC CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For the dual-pulse output solid-state modulator, since the original output pulse current intensity changes at intervals, and the operating frequency reaches hundreds of hertz, one matching parameter cannot satisfy two output currents at the same time, and only one of the pulse intensity can be adjusted. flat while another pulse top will not be flat, such as Figure 9 As shown, the matching circuit outputs the low-energy pulse current as I1 and adjusts it; but when sending a high-energy pulse, the pulse current will change between I2-I3, and the two pulse waveforms cannot be adjusted at the same time.

Method used

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  • Load matching circuit of double-pulse solid-state modulator and control method thereof
  • Load matching circuit of double-pulse solid-state modulator and control method thereof
  • Load matching circuit of double-pulse solid-state modulator and control method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0034] Such as figure 1 As shown, a load matching circuit of a double-pulse solid-state modulator includes a matching capacitor C0, a matching capacitor C1, a controlled switch K1 and a matching resistor R1, the first end of the capacitor C0 and the first output winding of the pulse transformer 102 The second end of the capacitor C0 is connected to the first end of the capacitor C1; the second end of the capacitor C1 is connected to the first end of the resistor R; the second end of the resistor R is grounded; the controlled switch K1 and the Capacitor C1 is connected in parallel to form a variable capacitance unit. When the pulse switch 101 is turned on to output a double pulse, which is output to the load matching circuit 103 through the pulse transformer 102, and when the output double pulse is adjusted, the control logic of the switch K1 is as follows image 3 As shown, at time t0, the double-pulse solid-state modulator outputs a low-energy pulse. At this time, the contr...

Embodiment 2

[0036] Such as figure 2 As shown, the difference between this example and Embodiment 1 is that the pulse transformer 102 of this embodiment also includes a second output winding of the pulse transformer and a capacitor Cm, the first end of the capacitor Cm is connected to the first output winding of the pulse transformer, The second terminal of the capacitor Cm is connected to the second output winding of the pulse transformer. The pulse transformer can make the two windings output double pulses at the same time. The two windings are connected by a capacitor, and the load matching circuit 103 can simultaneously connect the two windings. The high and low pulses of the output winding are leveled. In this embodiment, high and low pulses can be output on the two output windings.

Embodiment 3

[0038] Such as Figure 4 As shown, the difference between this embodiment and Embodiment 2 is that the load matching circuit of this embodiment includes a plurality of variable capacitance units, the capacitor C0 is connected in series with the plurality of variable capacitance units, and the multiple receivers of the plurality of variable capacitance units The control switch uses the same control signal, and this embodiment can provide higher capacitance parameters compared with embodiment 2.

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Abstract

The invention relates to the field of double-pulse flat-topped leveling, in particular to a load matching circuit of a double-pulse solid-state modulator and a control method of the load matching circuit, the load matching circuit comprises at least i matching capacitors, at least n variable capacitor units and at least one matching resistor, i is an integer, n is a positive integer, i is greaterthan or equal to 0, and n is greater than or equal to 1; the variable capacitor unit comprises a capacitor and a controlled switch; the input end of the load matching circuit is used for being connected with a first output winding of a pulse transformer. The output end of the load matching circuit is grounded, at least n variable capacitor units are connected with i matching capacitors in series or in parallel and then connected with a matching resistor in series, n + i is larger than or equal to 2, and the equivalent capacitance of the load matching circuit can be adjusted by adjusting opening and closing of the controlled switch. By adding the controlled switch on the load matching circuit and adjusting capacitance parameters through the controlled switch, the problem that two pulse currents cannot be leveled at the same time when the double-pulse modulator alternately outputs different pulse amplitudes can be effectively solved, and the output stability can also be improved.

Description

technical field [0001] The invention relates to the technical field of double-pulse flat-top leveling, in particular to a load matching circuit of a double-pulse solid-state modulator and a control method thereof. Background technique [0002] Traditional solid-state modulators mostly output a single pulse intensity. With the change of actual application requirements, it is gradually necessary for the modulator to output two different pulse intensities to work alternately, that is, a double-pulse output solid-state modulator. [0003] The pulse output solid-state modulator has high output pulse power, high voltage, and large current. The user system is particularly concerned about key technical parameters such as the rising edge time of the pulse waveform and whether the pulse current is flat. Whether the pulse current is flat or not has an important influence on whether the output of the subsequent stage is stable. [0004] For the flat-top adjustment of the pulse current ...

Claims

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Application Information

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IPC IPC(8): H03K7/02H03K5/15H03K17/567
CPCH03K7/02H03K5/15H03K17/567
Inventor 周英怀杜辉邓长春常双权
Owner SICHUAN INJET ELECTRIC CO LTD