Embedded chip and manufacturing method thereof
A manufacturing method and embedded technology, which is applied in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve the problem of reducing the size of package interconnection, difficult to meet high-frequency and high-speed signal transmission, and difficult to achieve high heat dissipation chips, etc. problem, to achieve good heat dissipation and improve the effect of heat dissipation
Pending Publication Date: 2020-03-03
SHENNAN CIRCUITS
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Problems solved by technology
[0002] With the development of high-frequency and high-speed requirements for electronic products, traditional wire-bonded packaging and flip-chip packaging interconnection methods are difficult to meet the needs of high-frequency and high-speed signal transmission. Therefore, more and more chips are embedded in the substrate or fan-out at the wafer level. The process realizes bare chip packaging, reduces the package interconnection size and realizes the high-frequency and high-speed transmission of the chip to meet the signal integrity requirements
However, the embedded packaging scheme of the existing technology is difficult to meet the needs of high heat dissipation chips
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[0011] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the embodiments described below are only some of the embodiments of the present application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.
[0012] In order to make the technical solutions provided by the embodiments of the present application clearer, the following embodiments describe the technical solutions of the present application in detail in conjunction with the accompanying drawings.
[0013] see figure 1 , figure 1 It is a schematic flowchart of a method for manufacturing an embedded chip provided in an embodiment of the present application. Such as figure 1 As shown, the manufactu...
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The invention provides an embedded chip and a manufacturing method thereof. The manufacturing method comprises the following steps: a metal substrate is provided, wherein a metal layer is arranged onthe metal substrate, and a plurality of grooves are formed in the metal layer; a chip is placed on the metal substrate and located in the groove, wherein the chip comprises a first chip surface away from the metal substrate, and a connecting terminal is arranged on the first chip surface; a dielectric layer is arranged on the first chip surface of the chip; and the connecting terminal of the chipis fanned out. The chip is arranged in the groove of the metal substrate and the metal layer, a plurality of surfaces of the chip are surrounded by the metal material, for example, the chip comprisessix surfaces, the five surfaces, including the surface in contact with the metal substrate and the four side surfaces adjacent to the metal layer, of the chip are all surrounded by the metal material,and due to the good heat dissipation performance of metal, the embedded chip can be effectively cooled, the heat dissipation capacity of the chip is improved, and the heat dissipation requirements ofvarious chips are met.
Description
technical field [0001] The present application relates to the technical field of chip packaging, in particular to an embedded chip and a manufacturing method thereof. Background technique [0002] With the development of high-frequency and high-speed requirements for electronic products, traditional wire-bonded packaging and flip-chip packaging interconnection methods are difficult to meet the needs of high-frequency and high-speed signal transmission. Therefore, more and more chips are embedded in the substrate or fan-out at the wafer level. The process realizes bare chip packaging, reduces the package interconnection size and realizes the high-frequency and high-speed transmission of the chip to meet the signal integrity requirements. However, the embedded packaging solution in the prior art is difficult to meet the requirement of high heat dissipation chips. Contents of the invention [0003] The technical problem mainly solved by this application is to provide an embe...
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IPC IPC(8): H01L21/50H01L21/56H01L23/367H01L23/373
CPCH01L21/50H01L21/56H01L23/367H01L23/3736H01L2224/18
Inventor 谷新
Owner SHENNAN CIRCUITS