Hybrid memristor/field-effect transistor memory cell and information encoding scheme thereof

Abstract

A resistive random-access memory (ReRAM) includes a hybrid memory cell. The hybrid memory cell includes: (a) a left resistance-switching device comprising a first terminal and a second terminal, (b) aright resistance-switching device comprising a first terminal and a second terminal, wherein the first terminal of the right resistance-switching device is connected to the first terminal of the left-resistive switching device at an internal node, and (c) a transistor comprising a source terminal, a drain terminal, and a gate terminal, wherein the drain terminal of the transistor is connected tothe left resistance-switching device and the right resistance-switching device at the internal node.

Description

[0001] Cross References to Related Applications [0002] This patent application claims the benefit of U.S. Provisional Patent Application No. 62 / 604,905, filed July 26, 2017, which is incorporated herein by reference. Background technique [0003] In the quest for next-generation memory with high density, low power consumption, and high performance, memristors stand out as non-volatile memory (NVM) technology. Memristors are potentially superior to other NVM technologies due to the following three properties: (1) The filamentary nature of memristors makes them virtually insensitive to the size of the device, i.e., their size can be reduced without degrading their memory properties , such as retention time, switching time, and on / off ratio; (2) its highly nonlinear switching dynamics allow the removal of access elements, such as transistors from the memory cell, which is beneficial in reducing the complexity and size of the memory cell , because the access element usually occ...

AI Technical Summary

Problems solved by technology

Although CRS is a material-agnostic approach, unlike other solutions that require tailor-made materials, its read scheme is destructive and the write operation needs to be resumed during each read

By requiring resuming write operations, the complexity of the peripheral circuitry increases and, in fact, the read power, read bandwidth, and endurance of the memristor cell are negatively affected

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