Unlock instant, AI-driven research and patent intelligence for your innovation.

Substrate Metal Layer Structure for Wire Bonding and Power Semiconductor Devices

A substrate metal layer, wire bonding technology, applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc. The process is simple to achieve, preventing falling off, and the effect of effective bonding

Active Publication Date: 2021-08-10
ZHUZHOU CRRC TIMES SEMICON CO LTD
View PDF0 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

But there are also some problems at the same time. Compared with aluminum, copper is harder, and wire bonding requires greater bonding force to achieve successful bonding. Similarly, using thicker wires for bonding also requires greater bonding force, and larger The bonding force is easy to cause damage to the substrate (usually a chip or a substrate), degrade or even fail the device performance, and usually need to add a thicker metal layer on the substrate surface, and a thicker metal layer will cause greater stress. Especially in a high temperature environment, it is easy to cause the substrate to bend, the metal layer to peel and even the bonding point to fall off, resulting in device failure, which seriously affects the reliability of the device and shortens the service life of the product
[0003] Among the existing invention patents at home and abroad, aluminum, copper, gold and other metals have been widely used in semiconductor wire bonding, and some patents mention the use of wire bonding pads, pads, metal balls and other methods to achieve wire bonding. Bonding, however most of this is applied to the lead frame in the package structure without modification to the metal layer

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Substrate Metal Layer Structure for Wire Bonding and Power Semiconductor Devices

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0021] The present invention will be further described below in conjunction with accompanying drawing.

[0022] figure 1 It is a schematic structural diagram of the substrate metal layer structure 100 for wire bonding provided in this application. Such as figure 1 As shown, the substrate metal layer structure 100 includes from bottom to top:

[0023] substrate 110;

[0024] a metal layer 120 disposed on the upper surface of the substrate 110; and

[0025] Leads, which are arranged on the surface of the principle substrate 110 of the metal layer and form a wire bond with the metal layer 120;

[0026] Wherein, the metal layer 120 includes a plurality of sub-metal layers stacked, and the surface areas of the sub-metal layers gradually decrease from bottom to top.

[0027] In the current semiconductor devices using the wire bonding process, there is a thick metal layer on the surface of the substrate. During the operation of the device, especially in a high-temperature enviro...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
thicknessaaaaaaaaaa
Login to View More

Abstract

The present application provides a substrate metal layer structure for wire bonding and a power semiconductor device. The substrate metal layer structure sequentially includes: a substrate; a metal layer disposed on the upper surface of the substrate; and leads, which are arranged on the surface of the metal layer away from the substrate and form a wire bond with the metal layer; wherein the metal layer includes a plurality of sub-metal layers stacked, and the plurality of sub-metal layers The surface area decreases gradually from bottom to top. Through the metal layer structure of the substrate and the power semiconductor device, the failure rate of wire bonding can be successfully reduced, the stress of the metal layer is small, the process is simple to realize, the cost is low, and the reliability of the device is improved.

Description

technical field [0001] The present invention relates to the technical field of semiconductors, and more specifically, to a substrate metal layer structure for wire bonding and a power semiconductor device. Background technique [0002] At present, power semiconductor devices are gradually developing towards high power density and high heat dissipation capacity, which requires the metal layer and leads used inside the device to have the characteristics of high thermal conductivity and high current carrying capacity. In practice, aluminum materials are changed to copper materials. At the same time, thickening the lead wire can increase the current density of the device, thereby prolonging the service life of the device. But there are also some problems at the same time. Compared with aluminum, copper is harder, and wire bonding requires greater bonding force to achieve successful bonding. Similarly, using thicker wires for bonding also requires greater bonding force, and large...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/482H01L23/498H01L23/49H01L21/60
CPCH01L23/482H01L23/498H01L24/48H01L2224/0231H01L2224/02333H01L2224/02373H01L2224/0239H01L2224/48096H01L2224/05H01L2224/4847
Inventor 张鸿鑫刘国友罗海辉谭灿健冯宇韩星尧
Owner ZHUZHOU CRRC TIMES SEMICON CO LTD
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More