Semiconductor device integrated structure and method
An integration method and semiconductor technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve problems such as film fracture
Active Publication Date: 2020-05-12
NINGBO SEMICON INT CORP
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Problems solved by technology
[0009]
The purpose of the present invention is to provide an integrated structure and method of semiconductor devices to solve the problem of film layer fracture caused by the through hole of the dielectric layer above the organic film layer
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[0028] The present invention will be described in further detail below in conjunction with the accompanying drawings and specific embodiments. According to the following description and accompanying drawings, the advantages and characteristics of the present invention will be clearer, however, it should be noted that the concept of the technical solution of the present invention can be implemented in many different forms, and is not limited to the specific implementation set forth herein. example. The drawings are all in very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention.
[0029] It will be understood that when an element or layer is referred to as being "on," "adjacent," "connected to" or "coupled to" another element or layer, it can be directly on the other element or layer. A layer may be on, adjacent to, connected to, or coupled to other elements or layers,...
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The invention discloses a semiconductor device integrated structure and method. The integration method comprises the steps that a first structure is provided, the first structure comprises a first dielectric layer, a first organic film layer and a substrate from top to bottom, a plurality of second electronic devices are embedded in the substrate, a through hole and an area within the set range ofthe periphery of the through hole are defined as a first area, and the first dielectric layer of the first area is removed; a second organic film layer is formed in the first area, the absolute valueof the difference between the thermal expansion coefficients of the second organic film layer and the first organic film layer is smaller than the absolute value of the difference between the thermalexpansion coefficients of the first dielectric layer and the first organic film layer, and the flexibility of the second organic film layer is larger than that of the first dielectric layer; a through hole is formed and penetrates through the second organic film layer and the first organic film layer, and the second electronic device is exposed out of the bottom of the through hole; and a conductive plug is formed in the through hole, wherein the conductive plug is connected with the second electronic device.
Description
technical field [0001] The invention relates to the field of semiconductor device manufacturing, in particular to an integrated structure and method of a semiconductor device. Background technique [0002] With the development of market demand for semiconductor power devices, ultra-small and ultra-thin chips, 3D stacked small-profile and high-integration packages are the development trend. [0003] Among them, 3D packaging refers to a packaging technology in which two or more chips are stacked vertically in the same package without changing the size of the package. In terms of size and weight, 3D design instead of single-chip packaging reduces device size and weight. Compared with traditional packaging, the use of 3D technology can reduce the size and weight by 40-50 times; in terms of speed, the power saved by 3D technology can make 3D components operate at a faster switching speed per second without increasing energy consumption, parasitic Capacitance and inductance can ...
Claims
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IPC IPC(8): H01L21/822H01L27/06H01L23/532
CPCH01L21/8221H01L27/0688H01L23/53295
Inventor 汪新学王敬平吴月含孙超李洪波
Owner NINGBO SEMICON INT CORP