IC test equipment

Abstract

The invention relates to an integrated circuit testing device, which comprises a test machine, a programmable circuit and a signal conversion circuit, and the programmable circuit is respectively electrically connected to the vector storage module and the signal conversion circuit of the test machine. The signal conversion circuit is used to electrically connect the test chip. The vector storage module is used for storing the compressed test vector, and determining the test result of the test chip according to the compressed response returned by the programmable circuit. The compressed response is a response obtained by compressing the test response returned by the test chip by the programmable circuit. The programmable circuit is used for decompressing the compressed test vector and outputting it to the test chip and compressing the test response. The signal conversion circuit is used for aligning the decompressed test vectors, performing logic level conversion output, receiving test responses and sending them back to the programmable circuit. The decompression and compression of the test vectors are pre-loaded to the programmable circuit, which reduces the test vector storage and transmission pressure of the test machine and greatly improves the test efficiency.

Description

technical field [0001] The invention relates to the technical field of circuit testing, in particular to an integrated circuit testing device. Background technique [0002] With the continuous improvement of the scale of integrated circuits, the wafer area of ​​integrated circuits is also increasing, and there will inevitably be failed transistors in the manufacturing process of integrated circuits, so it is possible to efficiently detect failed units in integrated circuits, such as the aforementioned failure Transistors are of great significance for reducing the cost of testing integrated circuits. [0003] Taking a common sequential integrated circuit as an example, the current common test method is to use a scan chain to replace registers with scan registers to control each register. The test vector is input bit by bit into the integrated circuit in a serial manner, and this method will make the length of a single test vector longer, and it will take time to apply the te...

AI Technical Summary

Problems solved by technology

However, in the process of implementation, the inventor found that the traditional integrated circuit testing method still has the problem of low test efficiency

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