A SoC low power consumption processing method and device

Abstract

The present invention provides a SoC low power consumption processing method and device, the method includes the following process: Standby process: during standby, the SoC operates the sleep pin, sets the status register of the PMIC to the sleep state, and disconnects the power supply for the SoC The first power supply, while maintaining the second power supply to continue to supply power to the DDR; through the ddr io retention function to maintain some DDR control IO, so that the DDR continues to be in the self-refresh state; wake-up process: when the wake-up is triggered, the PMIC automatically restores the first A power supply, so that the SoC is reset again. At this time, the DDR recovery code recognizes that the status register of the PMIC is in a sleep state, and it is determined to be a recovery process, and then the DDR recovery process is executed. The invention can quickly realize the complete power-off and recovery of SoC, and the circuit structure is simple.

Description

technical field [0001] The invention relates to the field of chip technology, in particular to a SoC low power consumption processing method and device. Background technique [0002] After the embedded SoC (System on Chip, system-on-chip) system is in standby, the ideal state is to completely power off the SoC. It is only necessary to keep the DDR in the peripheral circuit to maintain self-refresh and maintain some IO states, but this process is relatively cumbersome. [0003] A Chinese invention with a publication date of 20100811 and a publication number of CN101802750A provides a device and method for reducing power consumption in a system on chip (SoC). The SoC includes a clock unit, which is used to provide clocks to all components contained in the SoC; a central processing unit (CPU), which is used to control the SoC to perform specified functions; and a main voltage regulator, which is used to supply power supplied from an external battery to elements other than the ...

AI Technical Summary

Problems solved by technology

Adopt this kind of integrated circuit SoC chip to realize the circuit structure and method of reducing power consumption. When the chip is idle, the working domain is in a power-off state, and the real-time domain generates static power consumption. As long as the real-time domain leakage is made small enough, the static power consumption of the chip will be reduced. It will be low enough to effectively reduce the static power consumption of the SoC chip, but because it divides the working domain that is powered off when idle and the real-time domain that is always powered off in the SoC chip, it can be seen that in order to ensure that the real-time domain is always powered on , it is impossible to minimize the overall power consumption of the SoC chip, so it is not the optimal technical solution

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