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Non-volatile memory data consistency update method based on one-to-many page mapping

A non-volatile and consistent technology, applied in electrical digital data processing, multi-programming devices, program control design, etc., can solve problems such as dependencies, and achieve the effect of extending service life, reducing the number of write operations, and improving execution efficiency.

Active Publication Date: 2022-03-22
NAT UNIV OF DEFENSE TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, most of the internal implementations of such non-volatile programming libraries still rely on the log mechanism, so it is still unavoidable to introduce double write overhead and sequential constraint overhead to NVRAM.

Method used

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  • Non-volatile memory data consistency update method based on one-to-many page mapping
  • Non-volatile memory data consistency update method based on one-to-many page mapping
  • Non-volatile memory data consistency update method based on one-to-many page mapping

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Experimental program
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Embodiment Construction

[0055] Such as image 3 Shown, the present invention comprises the following steps:

[0056] The first step is to build a non-volatile memory consistent update system, which is released to user applications in the form of a dynamic link library. Non-volatile memory coherent update systems such as figure 1 As shown, it consists of a dynamic non-volatile memory allocation module, an update cycle management module, a memory access monitoring module, and a non-volatile data version management module.

[0057] The dynamic non-volatile memory allocation module is connected with the memory access monitoring module and the non-volatile data version management module, and the dynamic non-volatile memory allocation module receives pmalloc (size) requests or pfree (ptr) requests from user applications.

[0058] The dynamic non-volatile memory allocation module consists of a dynamic non-volatile memory allocator, a DRAM cache resource pool, and two non-volatile memory NVRAMs of the same...

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Abstract

The invention discloses a non-volatile memory data consistency update method based on one-to-many page mapping, aiming to solve double non-volatile memory write operation overhead. The technical solution is to build a non-volatile memory consistent update system composed of a dynamic non-volatile memory allocation module, an update cycle management module, a memory access monitoring module, and a non-volatile data version management module, providing dynamic non-volatile memory for user applications. Memory allocation / release interface, maintaining 1 DRAM cache and 2 non-volatile backups for each non-volatile memory object. The non-volatile data version management module consistently writes the content of the DRAM cache to the non-volatile backup page corresponding to the DRAM cache page. During the consistent update process, only one non-volatile backup of the non-volatile memory object is updated. operation, while another non-volatile backup acts as a consistent data backup in case of failure. Using the present invention to perform a consistent update operation on the non-volatile memory only introduces a single write to the non-volatile memory.

Description

technical field [0001] The invention relates to the field of computer system software, in particular to a method for maintaining data consistency of non-volatile memory by means of one-to-many memory page mapping. Background technique [0002] The storage system of the current mainstream computer system can generally be divided into two levels: main memory and auxiliary memory. The main feature of the main memory device (such as DRAM) is to support byte-granularity addressing, fast access speed, and data loss after power failure, while the characteristic of the auxiliary storage device (such as disk) is to only support coarse-grained access (such as data blocks as unit), slow access speed, and non-volatile data. With the improvement of computer computing performance and the expansion of system scale, the above-mentioned storage level constraints make the storage system gradually become the bottleneck of the system's comprehensive performance. Under the above trend, a new s...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/50
CPCG06F9/5016G06F9/5022
Inventor 卢凯张文喆迟万庆王睿伯张伟董勇周恩强谢旻高颖慧吴振伟
Owner NAT UNIV OF DEFENSE TECH
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